[v2,04/13] media: ti: j721e-csi2rx: prepare SHIM code for multiple contexts
Commit Message
From: Pratyush Yadav <p.yadav@ti.com>
Currently the SHIM code to configure the context only touches the first
context. Add support for writing to the context's registers based on the
context index.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Jai Luthra <j-luthra@ti.com>
---
drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
Comments
Hi Jai
On Thu, Jun 27, 2024 at 06:39:59PM GMT, Jai Luthra wrote:
> From: Pratyush Yadav <p.yadav@ti.com>
>
> Currently the SHIM code to configure the context only touches the first
> context. Add support for writing to the context's registers based on the
> context index.
>
> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
> Signed-off-by: Jai Luthra <j-luthra@ti.com>
Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
Thanks
j
> ---
> drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
> index d8dfe0002b72..bffc8165fd33 100644
> --- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
> +++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
> @@ -25,7 +25,7 @@
> #define SHIM_CNTL 0x10
> #define SHIM_CNTL_PIX_RST BIT(0)
>
> -#define SHIM_DMACNTX 0x20
> +#define SHIM_DMACNTX(i) (0x20 + ((i) * 0x20))
> #define SHIM_DMACNTX_EN BIT(31)
> #define SHIM_DMACNTX_YUV422 GENMASK(27, 26)
> #define SHIM_DMACNTX_SIZE GENMASK(21, 20)
> @@ -35,7 +35,7 @@
> #define SHIM_DMACNTX_SIZE_16 1
> #define SHIM_DMACNTX_SIZE_32 2
>
> -#define SHIM_PSI_CFG0 0x24
> +#define SHIM_PSI_CFG0(i) (0x24 + ((i) * 0x20))
> #define SHIM_PSI_CFG0_SRC_TAG GENMASK(15, 0)
> #define SHIM_PSI_CFG0_DST_TAG GENMASK(31, 16)
>
> @@ -549,11 +549,11 @@ static void ti_csi2rx_setup_shim(struct ti_csi2rx_ctx *ctx)
>
> reg |= FIELD_PREP(SHIM_DMACNTX_SIZE, fmt->size);
>
> - writel(reg, csi->shim + SHIM_DMACNTX);
> + writel(reg, csi->shim + SHIM_DMACNTX(ctx->idx));
>
> reg = FIELD_PREP(SHIM_PSI_CFG0_SRC_TAG, 0) |
> FIELD_PREP(SHIM_PSI_CFG0_DST_TAG, 0);
> - writel(reg, csi->shim + SHIM_PSI_CFG0);
> + writel(reg, csi->shim + SHIM_PSI_CFG0(ctx->idx));
> }
>
> static void ti_csi2rx_drain_callback(void *param)
> @@ -870,7 +870,7 @@ static int ti_csi2rx_start_streaming(struct vb2_queue *vq, unsigned int count)
> err_pipeline:
> video_device_pipeline_stop(&ctx->vdev);
> writel(0, csi->shim + SHIM_CNTL);
> - writel(0, csi->shim + SHIM_DMACNTX);
> + writel(0, csi->shim + SHIM_DMACNTX(ctx->idx));
> err:
> ti_csi2rx_cleanup_buffers(ctx, VB2_BUF_STATE_QUEUED);
> return ret;
> @@ -885,7 +885,7 @@ static void ti_csi2rx_stop_streaming(struct vb2_queue *vq)
> video_device_pipeline_stop(&ctx->vdev);
>
> writel(0, csi->shim + SHIM_CNTL);
> - writel(0, csi->shim + SHIM_DMACNTX);
> + writel(0, csi->shim + SHIM_DMACNTX(ctx->idx));
>
> ret = v4l2_subdev_call(csi->source, video, s_stream, 0);
> if (ret)
>
> --
> 2.43.0
>
>
@@ -25,7 +25,7 @@
#define SHIM_CNTL 0x10
#define SHIM_CNTL_PIX_RST BIT(0)
-#define SHIM_DMACNTX 0x20
+#define SHIM_DMACNTX(i) (0x20 + ((i) * 0x20))
#define SHIM_DMACNTX_EN BIT(31)
#define SHIM_DMACNTX_YUV422 GENMASK(27, 26)
#define SHIM_DMACNTX_SIZE GENMASK(21, 20)
@@ -35,7 +35,7 @@
#define SHIM_DMACNTX_SIZE_16 1
#define SHIM_DMACNTX_SIZE_32 2
-#define SHIM_PSI_CFG0 0x24
+#define SHIM_PSI_CFG0(i) (0x24 + ((i) * 0x20))
#define SHIM_PSI_CFG0_SRC_TAG GENMASK(15, 0)
#define SHIM_PSI_CFG0_DST_TAG GENMASK(31, 16)
@@ -549,11 +549,11 @@ static void ti_csi2rx_setup_shim(struct ti_csi2rx_ctx *ctx)
reg |= FIELD_PREP(SHIM_DMACNTX_SIZE, fmt->size);
- writel(reg, csi->shim + SHIM_DMACNTX);
+ writel(reg, csi->shim + SHIM_DMACNTX(ctx->idx));
reg = FIELD_PREP(SHIM_PSI_CFG0_SRC_TAG, 0) |
FIELD_PREP(SHIM_PSI_CFG0_DST_TAG, 0);
- writel(reg, csi->shim + SHIM_PSI_CFG0);
+ writel(reg, csi->shim + SHIM_PSI_CFG0(ctx->idx));
}
static void ti_csi2rx_drain_callback(void *param)
@@ -870,7 +870,7 @@ static int ti_csi2rx_start_streaming(struct vb2_queue *vq, unsigned int count)
err_pipeline:
video_device_pipeline_stop(&ctx->vdev);
writel(0, csi->shim + SHIM_CNTL);
- writel(0, csi->shim + SHIM_DMACNTX);
+ writel(0, csi->shim + SHIM_DMACNTX(ctx->idx));
err:
ti_csi2rx_cleanup_buffers(ctx, VB2_BUF_STATE_QUEUED);
return ret;
@@ -885,7 +885,7 @@ static void ti_csi2rx_stop_streaming(struct vb2_queue *vq)
video_device_pipeline_stop(&ctx->vdev);
writel(0, csi->shim + SHIM_CNTL);
- writel(0, csi->shim + SHIM_DMACNTX);
+ writel(0, csi->shim + SHIM_DMACNTX(ctx->idx));
ret = v4l2_subdev_call(csi->source, video, s_stream, 0);
if (ret)