| Message ID | 20240612173213.42827-6-sebastian.reichel@collabora.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers |
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Wed, 12 Jun 2024 17:32:22 +0000 (UTC) Received: by jupiter.universe (Postfix, from userid 1000) id 624CA4800D0; Wed, 12 Jun 2024 19:32:21 +0200 (CEST) From: Sebastian Reichel <sebastian.reichel@collabora.com> To: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>, Philipp Zabel <p.zabel@pengutronix.de>, Nicolas Frattaroli <frattaroli.nicolas@gmail.com>, Heiko Stuebner <heiko@sntech.de> Cc: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Jianfeng Liu <liujianfeng1994@gmail.com>, Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>, Nicolas Dufresne <nicolas.dufresne@collabora.com>, linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@collabora.com, Hugh Cole-Baker <sigmaris@gmail.com>, Sebastian Reichel <sebastian.reichel@collabora.com> Subject: [PATCH v5 5/5] arm64: dts: rockchip: Add VPU121 support for RK3588 Date: Wed, 12 Jun 2024 19:15:45 +0200 Message-ID: <20240612173213.42827-6-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240612173213.42827-1-sebastian.reichel@collabora.com> References: <20240612173213.42827-1-sebastian.reichel@collabora.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: <linux-media.vger.kernel.org> List-Subscribe: <mailto:linux-media+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-media+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-LSpam-Score: -2.6 (--) X-LSpam-Report: No, score=-2.6 required=5.0 tests=ARC_SIGNED=0.001,ARC_VALID=-0.1,BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,DMARC_PASS=-0.001,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,SPF_HELO_NONE=0.001,SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no |
| Series |
RK3588 VEPU121/VPU121 support
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Commit Message
Sebastian Reichel
June 12, 2024, 5:15 p.m. UTC
From: Jianfeng Liu <liujianfeng1994@gmail.com> Enable Hantro G1 video decoder in RK3588's devicetree. Tested with FFmpeg v4l2_request code taken from [1] with MPEG2, H.264 and VP8 samples. [1] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Tested-by: Hugh Cole-Baker <sigmaris@gmail.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)
Comments
Hi, On Wednesday, 12 June 2024 19:15:45 CEST Sebastian Reichel wrote: > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index > 9edbcfe778ca..e7e1b456b9b9 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > @@ -1239,6 +1239,27 @@ jpeg_enc3_mmu: iommu@fdbac800 { > #iommu-cells = <0>; > }; > > + vpu: video-codec@fdb50000 { > + compatible = "rockchip,rk3588-vpu121", > "rockchip,rk3568-vpu"; + reg = <0x0 0xfdb50000 0x0 0x800>; > + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; > + interrupt-names = "vdpu"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + clock-names = "aclk", "hclk"; > + iommus = <&vpu_mmu>; > + power-domains = <&power RK3588_PD_VDPU>; > + }; > + > + vpu_mmu: iommu@fdb50800 { > + compatible = "rockchip,rk3588-iommu", > "rockchip,rk3568-iommu"; + reg = <0x0 0xfdb50800 0x0 0x40>; > + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; > + clock-names = "aclk", "iface"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + power-domains = <&power RK3588_PD_VDPU>; > + #iommu-cells = <0>; > + }; > + > av1d: video-codec@fdc70000 { Shouldn't these nodes come *before* jpeg_enc0: video-codec@fdba0000 As fdb50000 is lower then fdba0000? Cheers, Diederik
Hi, On Wed, Jun 12, 2024 at 08:10:30PM GMT, Diederik de Haas wrote: > On Wednesday, 12 June 2024 19:15:45 CEST Sebastian Reichel wrote: > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index > > 9edbcfe778ca..e7e1b456b9b9 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > @@ -1239,6 +1239,27 @@ jpeg_enc3_mmu: iommu@fdbac800 { > > #iommu-cells = <0>; > > }; > > > > + vpu: video-codec@fdb50000 { > > + compatible = "rockchip,rk3588-vpu121", > > "rockchip,rk3568-vpu"; + reg = <0x0 0xfdb50000 0x0 0x800>; > > + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; > > + interrupt-names = "vdpu"; > > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > > + clock-names = "aclk", "hclk"; > > + iommus = <&vpu_mmu>; > > + power-domains = <&power RK3588_PD_VDPU>; > > + }; > > + > > + vpu_mmu: iommu@fdb50800 { > > + compatible = "rockchip,rk3588-iommu", > > "rockchip,rk3568-iommu"; + reg = <0x0 0xfdb50800 0x0 0x40>; > > + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; > > + clock-names = "aclk", "iface"; > > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > > + power-domains = <&power RK3588_PD_VDPU>; > > + #iommu-cells = <0>; > > + }; > > + > > av1d: video-codec@fdc70000 { > > Shouldn't these nodes come *before* > jpeg_enc0: video-codec@fdba0000 > As fdb50000 is lower then fdba0000? Of course. I will fix that in v6. -- Sebastian
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 9edbcfe778ca..e7e1b456b9b9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1239,6 +1239,27 @@ jpeg_enc3_mmu: iommu@fdbac800 { #iommu-cells = <0>; }; + vpu: video-codec@fdb50000 { + compatible = "rockchip,rk3588-vpu121", "rockchip,rk3568-vpu"; + reg = <0x0 0xfdb50000 0x0 0x800>; + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "vdpu"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clock-names = "aclk", "hclk"; + iommus = <&vpu_mmu>; + power-domains = <&power RK3588_PD_VDPU>; + }; + + vpu_mmu: iommu@fdb50800 { + compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; + reg = <0x0 0xfdb50800 0x0 0x40>; + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; + clock-names = "aclk", "iface"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + power-domains = <&power RK3588_PD_VDPU>; + #iommu-cells = <0>; + }; + av1d: video-codec@fdc70000 { compatible = "rockchip,rk3588-av1-vpu"; reg = <0x0 0xfdc70000 0x0 0x800>;