[2/2] arm64: dts: mediatek: mt8186: Add jpgenc node
Commit Message
From: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Add JPEG encoder node.
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Max Staudt <mstaudt@chromium.org>
Tested-by: Max Staudt <mstaudt@chromium.org>
Reviewed-by: Ricardo Ribalda <ribalda@chromium.org>
[eugen.hristev@collabora.com: minor cleanup]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
Comments
Il 27/12/23 14:08, Eugen Hristev ha scritto:
> From: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
>
> Add JPEG encoder node.
>
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
> Reviewed-by: Max Staudt <mstaudt@chromium.org>
> Tested-by: Max Staudt <mstaudt@chromium.org>
> Reviewed-by: Ricardo Ribalda <ribalda@chromium.org>
> [eugen.hristev@collabora.com: minor cleanup]
> Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8186.dtsi | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> index e451b6c8cd9e..ef1b269f9184 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> @@ -2054,6 +2054,19 @@ venc: video-encoder@17020000 {
> mediatek,scp = <&scp>;
> };
>
> + jpgenc: jpgenc@17030000 {
Can we please call this jpeg-encoder@17030000 instead?
> + compatible = "mediatek,mt8186-jpgenc", "mediatek,mtk-jpgenc";
> + reg = <0 0x17030000 0 0x10000>;
> + interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&vencsys CLK_VENC_CKE2_JPGENC>;
> + clock-names = "jpgenc";
clock-names ...
iommus ....
power-domains ...
Cheers,
Angelo
@@ -2054,6 +2054,19 @@ venc: video-encoder@17020000 {
mediatek,scp = <&scp>;
};
+ jpgenc: jpgenc@17030000 {
+ compatible = "mediatek,mt8186-jpgenc", "mediatek,mtk-jpgenc";
+ reg = <0 0x17030000 0 0x10000>;
+ interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&vencsys CLK_VENC_CKE2_JPGENC>;
+ clock-names = "jpgenc";
+ power-domains = <&spm MT8186_POWER_DOMAIN_VENC>;
+ iommus = <&iommu_mm IOMMU_PORT_L7_JPGENC_Y_RDMA>,
+ <&iommu_mm IOMMU_PORT_L7_JPGENC_C_RDMA>,
+ <&iommu_mm IOMMU_PORT_L7_JPGENC_Q_TABLE>,
+ <&iommu_mm IOMMU_PORT_L7_JPGENC_BSDMA>;
+ };
+
camsys: clock-controller@1a000000 {
compatible = "mediatek,mt8186-camsys";
reg = <0 0x1a000000 0 0x1000>;