[v2,1/5] dt-bindings: soc: visconti: Add Toshiba Visconti DNN image processing accelerator bindings
Commit Message
This commit adds the Device Tree binding documentation that allows to describe
the DNN image processing accelerator found in Toshiba Visconti SoCs.
Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
.../soc/visconti/toshiba,visconti-dnn.yaml | 54 +++++++++++++++++++
1 file changed, 54 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/visconti/toshiba,visconti-dnn.yaml
new file mode 100644
@@ -0,0 +1,54 @@
+# SPDX-LIcense-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/visconti/toshiba,visconti-dnn.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Toshiba Visconti DNN image processing accelerator
+
+maintainers:
+ - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
+
+description: |
+ Toshiba Visconti DNN image processing accelerator.
+ Visconti5 have up to 2 DNN units.
+
+properties:
+ compatible:
+ items:
+ - const: toshiba,visconti-dnn
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ index:
+ enum: [0, 1]
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - index
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ dnn0: dnn@14280000 {
+ compatible = "toshiba,visconti-dnn";
+ reg = <0 0x14280000 0 0x8000>;
+ interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
+ index = <0>;
+ status = "disabled";
+ };
+ };