[1/4] dt-bindings: soc: visconti: Add Toshiba Visconti AFFINE image processing accelerator bindings
Commit Message
Adds the Device Tree binding documentation that allows to describe
the AFFINE image processing accelerator found in Toshiba Visconti SoCs.
Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
.../soc/visconti/toshiba,visconti-affine.yaml | 53 +++++++++++++++++++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/visconti/toshiba,visconti-affine.yaml
new file mode 100644
@@ -0,0 +1,53 @@
+# SPDX-LIcense-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/visconti/toshiba,visconti-affine.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Toshiba Visconti AFFINE image processing accelerator
+
+maintainers:
+ - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
+
+description: |
+ Toshiba Visconti AFFINE image processing accelerator provides affine transform, lens undistortion and LUT transform.
+ Visconti5 have up to 2 AFFINE units.
+
+properties:
+ compatible:
+ items:
+ - const: toshiba,visconti-affine
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ index:
+ enum: [0, 1]
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - index
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ affine0: affine@14000000 {
+ compatible = "toshiba,visconti-affine";
+ reg = <0 0x14000000 0 0x8000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ index = <0>;
+ status = "disabled";
+ };
+ };