Message ID | 20220315061031.21642-6-moudy.ho@mediatek.com (mailing list archive) |
---|---|
State | Superseded |
Headers |
Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from <linux-media-owner@vger.kernel.org>) id 1nU0PM-008htP-5T; Tue, 15 Mar 2022 06:11:48 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345145AbiCOGM4 (ORCPT <rfc822;mkrufky@linuxtv.org> + 1 other); Tue, 15 Mar 2022 02:12:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345163AbiCOGMt (ORCPT <rfc822;linux-media@vger.kernel.org>); Tue, 15 Mar 2022 02:12:49 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82AFA49FA2; Mon, 14 Mar 2022 23:11:37 -0700 (PDT) X-UUID: 9020a1ddc9f14415a324b4876df77003-20220315 X-UUID: 9020a1ddc9f14415a324b4876df77003-20220315 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from <moudy.ho@mediatek.com>) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 104757173; Tue, 15 Mar 2022 14:11:28 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Tue, 15 Mar 2022 14:11:26 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 15 Mar 2022 14:11:26 +0800 From: Moudy Ho <moudy.ho@mediatek.com> To: Mauro Carvalho Chehab <mchehab@kernel.org>, Rob Herring <robh+dt@kernel.org>, Matthias Brugger <matthias.bgg@gmail.com>, Hans Verkuil <hverkuil-cisco@xs4all.nl>, Jernej Skrabec <jernej.skrabec@siol.net> CC: Chun-Kuang Hu <chunkuang.hu@kernel.org>, Geert Uytterhoeven <geert+renesas@glider.be>, Rob Landley <rob@landley.net>, Laurent Pinchart <laurent.pinchart@ideasonboard.com>, <linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <linux-kernel@vger.kernel.org>, Alexandre Courbot <acourbot@chromium.org>, <tfiga@chromium.org>, <drinkcat@chromium.org>, <pihsun@chromium.org>, <hsinyi@google.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, Maoguang Meng <maoguang.meng@mediatek.com>, daoyuan huang <daoyuan.huang@mediatek.com>, Ping-Hsun Wu <ping-hsun.wu@mediatek.com>, <menghui.lin@mediatek.com>, <sj.huang@mediatek.com>, <allen-kh.cheng@mediatek.com>, <randy.wu@mediatek.com>, <moudy.ho@mediatek.com>, <jason-jh.lin@mediatek.com>, <roy-cw.yeh@mediatek.com>, <river.cheng@mediatek.com>, <srv_heupstream@mediatek.com>, <Project_Global_Chrome_Upstream_Group@mediatek.com> Subject: [PATCH v13 5/6] dts: arm64: mt8183: add GCE client property for Mediatek MUTEX Date: Tue, 15 Mar 2022 14:10:30 +0800 Message-ID: <20220315061031.21642-6-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220315061031.21642-1-moudy.ho@mediatek.com> References: <20220315061031.21642-1-moudy.ho@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-media.vger.kernel.org> X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.4 (--) X-LSpam-Report: No, score=-2.4 required=5.0 tests=BAYES_00=-1.9,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no |
Series |
Add mutex support for MDP
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Commit Message
Moudy Ho (何宗原)
March 15, 2022, 6:10 a.m. UTC
In order to allow modules with latency requirements such as MDP3
to set registers through CMDQ, add the relevant dts property.
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 +
1 file changed, 1 insertion(+)
Comments
Il 15/03/22 07:10, Moudy Ho ha scritto: > In order to allow modules with latency requirements such as MDP3 > to set registers through CMDQ, add the relevant dts property. > > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index 4b08691ed39e..fc6ac2a46324 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -1514,6 +1514,7 @@ > power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; > mediatek,gce-events = <CMDQ_EVENT_MUTEX_STREAM_DONE0>, > <CMDQ_EVENT_MUTEX_STREAM_DONE1>; > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x6000 0x1000>; > }; > > larb0: larb@14017000 {
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 4b08691ed39e..fc6ac2a46324 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1514,6 +1514,7 @@ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; mediatek,gce-events = <CMDQ_EVENT_MUTEX_STREAM_DONE0>, <CMDQ_EVENT_MUTEX_STREAM_DONE1>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x6000 0x1000>; }; larb0: larb@14017000 {