[1/4] media: aspeed: Correct value for h-total-pixels

  Previous reg-field, 0x98[11:0], stands for the period of the detected
hsync signal.
Use the correct reg, 0xa0, to get h-total in pixels.

Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com>
---
 drivers/media/platform/aspeed-video.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)
  

On Fri, 17 Dec 2021 at 09:54, Jammy Huang <jammy_huang@aspeedtech.com> wrote:
>
> Previous reg-field, 0x98[11:0], stands for the period of the detected
> hsync signal.
> Use the correct reg, 0xa0, to get h-total in pixels.
>
> Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com>

Fixes: d2b4387f3bdf ("media: platform: Add Aspeed Video Engine driver")
Reviewed-by: Joel Stanley <joel@jms.id.au>

> ---
>  drivers/media/platform/aspeed-video.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c
> index b388bc56ce81..d5f77b205175 100644
> --- a/drivers/media/platform/aspeed-video.c
> +++ b/drivers/media/platform/aspeed-video.c
> @@ -166,7 +166,7 @@
>  #define  VE_SRC_TB_EDGE_DET_BOT                GENMASK(28, VE_SRC_TB_EDGE_DET_BOT_SHF)
>
>  #define VE_MODE_DETECT_STATUS          0x098
> -#define  VE_MODE_DETECT_H_PIXELS       GENMASK(11, 0)
> +#define  VE_MODE_DETECT_H_PERIOD       GENMASK(11, 0)
>  #define  VE_MODE_DETECT_V_LINES_SHF    16
>  #define  VE_MODE_DETECT_V_LINES                GENMASK(27, VE_MODE_DETECT_V_LINES_SHF)
>  #define  VE_MODE_DETECT_STATUS_VSYNC   BIT(28)
> @@ -177,6 +177,8 @@
>  #define  VE_SYNC_STATUS_VSYNC_SHF      16
>  #define  VE_SYNC_STATUS_VSYNC          GENMASK(27, VE_SYNC_STATUS_VSYNC_SHF)
>
> +#define VE_H_TOTAL_PIXELS              0x0A0
> +
>  #define VE_INTERRUPT_CTRL              0x304
>  #define VE_INTERRUPT_STATUS            0x308
>  #define  VE_INTERRUPT_MODE_DETECT_WD   BIT(0)
> @@ -938,6 +940,7 @@ static void aspeed_video_get_resolution(struct aspeed_video *video)
>         u32 src_lr_edge;
>         u32 src_tb_edge;
>         u32 sync;
> +       u32 htotal;
>         struct v4l2_bt_timings *det = &video->detected_timings;
>
>         det->width = MIN_WIDTH;
> @@ -983,6 +986,7 @@ static void aspeed_video_get_resolution(struct aspeed_video *video)
>                 src_tb_edge = aspeed_video_read(video, VE_SRC_TB_EDGE_DET);
>                 mds = aspeed_video_read(video, VE_MODE_DETECT_STATUS);
>                 sync = aspeed_video_read(video, VE_SYNC_STATUS);
> +               htotal = aspeed_video_read(video, VE_H_TOTAL_PIXELS);
>
>                 video->frame_bottom = (src_tb_edge & VE_SRC_TB_EDGE_DET_BOT) >>
>                         VE_SRC_TB_EDGE_DET_BOT_SHF;
> @@ -999,8 +1003,7 @@ static void aspeed_video_get_resolution(struct aspeed_video *video)
>                         VE_SRC_LR_EDGE_DET_RT_SHF;
>                 video->frame_left = src_lr_edge & VE_SRC_LR_EDGE_DET_LEFT;
>                 det->hfrontporch = video->frame_left;
> -               det->hbackporch = (mds & VE_MODE_DETECT_H_PIXELS) -
> -                       video->frame_right;
> +               det->hbackporch = htotal - video->frame_right;
>                 det->hsync = sync & VE_SYNC_STATUS_HSYNC;
>                 if (video->frame_left > video->frame_right)
>                         continue;
> --
> 2.25.1
>