diff mbox

[3/5] media: platform: s5p-jpeg: Clear JPEG_CODEC_ON bits in sw reset function

Message ID 1502191628-11958-3-git-send-email-andrzej.p@samsung.com (mailing list archive)
State Accepted, archived
Delegated to: Sylwester Nawrocki
Headers

Commit Message

Andrzej Pietrasiewicz Aug. 8, 2017, 11:27 a.m. UTC 
  From: Tony K Nadackal <tony.kn@samsung.com>

Bits EXYNOS4_DEC_MODE and EXYNOS4_ENC_MODE do not get cleared
on software reset. These bits need to be cleared explicitly.

Even though the bits in question are already cleared in interrupt
service routine, the reset should also clear them in case e.g.
bootloader uses the codec and leaves it in a bad state.

Signed-off-by: Tony K Nadackal <tony.kn@samsung.com>
[Updated commit message]
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
---
 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox

Patch

diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c
index c784033..c72789b 100644
--- a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c
+++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c
@@ -21,6 +21,10 @@  void exynos4_jpeg_sw_reset(void __iomem *base)
 	unsigned int reg;
 
 	reg = readl(base + EXYNOS4_JPEG_CNTL_REG);
+	writel(reg & ~(EXYNOS4_DEC_MODE | EXYNOS4_ENC_MODE),
+				base + EXYNOS4_JPEG_CNTL_REG);
+
+	reg = readl(base + EXYNOS4_JPEG_CNTL_REG);
 	writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG);
 
 	udelay(100);