[v3,1/9,media] s5p-jpeg: Document sclk-jpeg clock for Exynos3250 SoC
Commit Message
From: Jacek Anaszewski <j.anaszewski@samsung.com>
JPEG IP on Exynos3250 SoC requires enabling two clock gates
for its operation. This patch documents this requirement.
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org
---
.../bindings/media/exynos-jpeg-codec.txt | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
--
1.7.9.5
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@@ -3,9 +3,13 @@ Samsung S5P/EXYNOS SoC series JPEG codec
Required properties:
- compatible : should be one of:
- "samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg";
+ "samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg",
+ "samsung,exynos3250-jpeg";
- reg : address and length of the JPEG codec IP register set;
- interrupts : specifies the JPEG codec IP interrupt;
-- clocks : should contain the JPEG codec IP gate clock specifier, from the
- common clock bindings;
-- clock-names : should contain "jpeg" entry.
+- clock-names : should contain:
+ - "jpeg" for the core gate clock,
+ - "sclk" for the special clock (optional).
+- clocks : should contain the clock specifier and clock ID list
+ matching entries in the clock-names property; from
+ the common clock bindings.