[v11,0/5] Add support for RZ/G2L VSPD

Message ID 20220531141958.575616-1-biju.das.jz@bp.renesas.com (mailing list archive)
Headers
Series Add support for RZ/G2L VSPD |

Message

Biju Das May 31, 2022, 2:19 p.m. UTC
  The RZ/G2L VSPD provides a single VSPD instance. It has the following
sub modules MAU, CTU, RPF, DPR, LUT, BRS, WPF and LIF.

The VSPD block on RZ/G2L does not have a version register, so added a
new compatible string "renesas,r9a07g044-vsp2" with a data pointer containing
the info structure. Also the reset line is shared with the DU module.

This patch series is tested on RZ/G1N, RZ/G2M and RZ/G2L boards.

v10->v11:
 * Added poll for reset status in order to avoid lock-up on R-Car Gen2
 * with vsp register access after deassert.

v9->v10
 * Moved {deassert,assert} calls to vsp1_pm_runtime_{resume,suspend}

V8->v9
 * Added Rb tag from Geert for patch#3
 * Replaced break with return info in case a Model match is found and
   removed additional check for non-match case.
 * Used generic check for matching SoCs with LBA feature.
 * Replaced the code comments RZ/G2L {SoC's,SoC} with RZ/G2L SoCs.
v7->v8:
 * Split the patch for adding s/w version, feature bit and RZ/G2L support
 * Added feature bit VSP1_HAS_NON_ZERO_LBA to device_info
 * Added .soc for RZ/G2L
 * Replaced the compatible "renesas,rzg2l-vsp2" -> "renesas,r9a07g044-vsp2"
 * Updated Clock-names to false for non RZ/G2L SoC's on binding doc
 * Added Rb tag from Laurent for bindings
v6->v7:
 * Added Rb tag from Kieran for patch#3
 * Added a quirk to handle LIF0 buffer attribute related
   changes for V3M and G2L.
 * Removed the macro for VSP HW version
v5->v6:
 * Rebased to media_staging and updated commit header
 * Removed LCDC reference clock description from bindings
 * Changed the clock name from du.0->aclk from bindings
 * Added Rb tag from Laurent for reset patch
 * Added forward declaration for struct reset_control
 * Updated vsp1_device_get() with changes suggested by Laurent
 * Updated error message for reset_control_get form ctrl->control.
 * Removed the extra tab from rzg2l_vsp2_device_info
 * Changed the function vsp1_lookup->vsp1_lookup_info and
   all info match related code moved here.
 * Add VI6_IP_VERSION_VSP and VI6_IP_VERSION_VSP_SW macros to
   distinguish HW & SW IP_VSP_Version.
 * Used 0x80 for RZG2L VSPD model and SoC identification
 * Updated Switch() for LIF0 buffer attribute handling.
v4->v5:
 * Fixed typo VI6_IP_VERSION_MODEL_MASK->VI6_IP_VERSION_MASK
 * To be consistent with other SoC's, introduced VI6_IP_VERSION_SOC_G2L
   for SoC identification for RZ/G2L SoC's.
v3->v4:
 * Restored error check for pm_runtime_resume_and_get and calls
   assert() in case of failure.
 * Added Rb tag from Geert
 * Add switch() for LIF0 buffer attribute handling for RZ/G2L and V3M SoC's
v2->v3:
 * Added Rb tags from Krzysztof and Philipp
 * If reset_control_deassert() failed, return ret directly.
 * Fixed version comparison in vsp1_lookup()
v1->v2:
 * Used reference counted reset handle to perform deassert/assert
 * Changed the compatible from vsp2-rzg2l->rzg2l-vsp2
 * Added standalone device info for rzg2l-vsp2.
 * Added vsp1_lookup helper function.
 * Updated comments for LIF0 buffer attribute register
 * Used last ID for rzg2l-vsp2.
RFC->v1:
 * Added reset support as separate patch
 * Moved rstc just after the bus_master field in struct vsp1_device
 * Used data pointer containing info structure to retrieve version information
 * Updated commit description
 * Changed compatible from vsp2-r9a07g044->vsp2-rzg2l
 * Defined the clocks
 * Clock max Items is based on SoC Compatible string
RFC:
 * https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-21-biju.das.jz@bp.renesas.com/
 * https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-20-biju.das.jz@bp.renesas.com/

Biju Das (5):
  media: dt-bindings: media: renesas,vsp1: Document RZ/G2L VSPD bindings
  media: renesas: vsp1: Add support to deassert/assert reset line
  media: renesas: vsp1: Add support for VSP software version
  media: renesas: vsp1: Add VSP1_HAS_NON_ZERO_LBA feature bit
  media: renesas: vsp1: Add support for RZ/G2L VSPD

 .../bindings/media/renesas,vsp1.yaml          |  53 ++++++---
 drivers/media/platform/renesas/vsp1/vsp1.h    |   4 +
 .../media/platform/renesas/vsp1/vsp1_drv.c    | 104 +++++++++++++++---
 .../media/platform/renesas/vsp1/vsp1_lif.c    |  12 +-
 .../media/platform/renesas/vsp1/vsp1_regs.h   |   6 +
 5 files changed, 145 insertions(+), 34 deletions(-)
  

Comments

Biju Das June 20, 2022, 6:52 a.m. UTC | #1
Hi All,

Gentle ping. Are we happy with this patch series?

Cheers,
Biju

> Subject: [PATCH v11 0/5] Add support for RZ/G2L VSPD
> 
> The RZ/G2L VSPD provides a single VSPD instance. It has the following
> sub modules MAU, CTU, RPF, DPR, LUT, BRS, WPF and LIF.
> 
> The VSPD block on RZ/G2L does not have a version register, so added a
> new compatible string "renesas,r9a07g044-vsp2" with a data pointer
> containing the info structure. Also the reset line is shared with the DU
> module.
> 
> This patch series is tested on RZ/G1N, RZ/G2M and RZ/G2L boards.
> 
> v10->v11:
>  * Added poll for reset status in order to avoid lock-up on R-Car Gen2
>  * with vsp register access after deassert.
> 
> v9->v10
>  * Moved {deassert,assert} calls to vsp1_pm_runtime_{resume,suspend}
> 
> V8->v9
>  * Added Rb tag from Geert for patch#3
>  * Replaced break with return info in case a Model match is found and
>    removed additional check for non-match case.
>  * Used generic check for matching SoCs with LBA feature.
>  * Replaced the code comments RZ/G2L {SoC's,SoC} with RZ/G2L SoCs.
> v7->v8:
>  * Split the patch for adding s/w version, feature bit and RZ/G2L
> support
>  * Added feature bit VSP1_HAS_NON_ZERO_LBA to device_info
>  * Added .soc for RZ/G2L
>  * Replaced the compatible "renesas,rzg2l-vsp2" -> "renesas,r9a07g044-
> vsp2"
>  * Updated Clock-names to false for non RZ/G2L SoC's on binding doc
>  * Added Rb tag from Laurent for bindings
> v6->v7:
>  * Added Rb tag from Kieran for patch#3
>  * Added a quirk to handle LIF0 buffer attribute related
>    changes for V3M and G2L.
>  * Removed the macro for VSP HW version
> v5->v6:
>  * Rebased to media_staging and updated commit header
>  * Removed LCDC reference clock description from bindings
>  * Changed the clock name from du.0->aclk from bindings
>  * Added Rb tag from Laurent for reset patch
>  * Added forward declaration for struct reset_control
>  * Updated vsp1_device_get() with changes suggested by Laurent
>  * Updated error message for reset_control_get form ctrl->control.
>  * Removed the extra tab from rzg2l_vsp2_device_info
>  * Changed the function vsp1_lookup->vsp1_lookup_info and
>    all info match related code moved here.
>  * Add VI6_IP_VERSION_VSP and VI6_IP_VERSION_VSP_SW macros to
>    distinguish HW & SW IP_VSP_Version.
>  * Used 0x80 for RZG2L VSPD model and SoC identification
>  * Updated Switch() for LIF0 buffer attribute handling.
> v4->v5:
>  * Fixed typo VI6_IP_VERSION_MODEL_MASK->VI6_IP_VERSION_MASK
>  * To be consistent with other SoC's, introduced VI6_IP_VERSION_SOC_G2L
>    for SoC identification for RZ/G2L SoC's.
> v3->v4:
>  * Restored error check for pm_runtime_resume_and_get and calls
>    assert() in case of failure.
>  * Added Rb tag from Geert
>  * Add switch() for LIF0 buffer attribute handling for RZ/G2L and V3M
> SoC's
> v2->v3:
>  * Added Rb tags from Krzysztof and Philipp
>  * If reset_control_deassert() failed, return ret directly.
>  * Fixed version comparison in vsp1_lookup()
> v1->v2:
>  * Used reference counted reset handle to perform deassert/assert
>  * Changed the compatible from vsp2-rzg2l->rzg2l-vsp2
>  * Added standalone device info for rzg2l-vsp2.
>  * Added vsp1_lookup helper function.
>  * Updated comments for LIF0 buffer attribute register
>  * Used last ID for rzg2l-vsp2.
> RFC->v1:
>  * Added reset support as separate patch
>  * Moved rstc just after the bus_master field in struct vsp1_device
>  * Used data pointer containing info structure to retrieve version
> information
>  * Updated commit description
>  * Changed compatible from vsp2-r9a07g044->vsp2-rzg2l
>  * Defined the clocks
>  * Clock max Items is based on SoC Compatible string
> RFC:
>  *
>  *
> 
> Biju Das (5):
>   media: dt-bindings: media: renesas,vsp1: Document RZ/G2L VSPD bindings
>   media: renesas: vsp1: Add support to deassert/assert reset line
>   media: renesas: vsp1: Add support for VSP software version
>   media: renesas: vsp1: Add VSP1_HAS_NON_ZERO_LBA feature bit
>   media: renesas: vsp1: Add support for RZ/G2L VSPD
> 
>  .../bindings/media/renesas,vsp1.yaml          |  53 ++++++---
>  drivers/media/platform/renesas/vsp1/vsp1.h    |   4 +
>  .../media/platform/renesas/vsp1/vsp1_drv.c    | 104 +++++++++++++++---
>  .../media/platform/renesas/vsp1/vsp1_lif.c    |  12 +-
>  .../media/platform/renesas/vsp1/vsp1_regs.h   |   6 +
>  5 files changed, 145 insertions(+), 34 deletions(-)
> 
> --
> 2.25.1
  
Biju Das July 13, 2022, 6:05 a.m. UTC | #2
Hi Mauro, Laurent and Kieran,

Gentle ping,

Are there any issues with this patch series for acceptance?

Please let me know. If needed, I can send new patch series/follow-up patches for the suggestions.

Cheers,
Biju

> -----Original Message-----
> From: Biju Das
> Sent: 20 June 2022 07:52
> To: Mauro Carvalho Chehab <mchehab@kernel.org>; Laurent Pinchart
> <laurent.pinchart@ideasonboard.com>; Kieran Bingham
> <kieran.bingham+renesas@ideasonboard.com>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>; linux-media@vger.kernel.org;
> linux-renesas-soc@vger.kernel.org; Geert Uytterhoeven
> <geert+renesas@glider.be>; Chris Paterson <Chris.Paterson2@renesas.com>;
> Biju Das <biju.das@bp.renesas.com>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: RE: [PATCH v11 0/5] Add support for RZ/G2L VSPD
> 
> Hi All,
> 
> Gentle ping. Are we happy with this patch series?
> 
> Cheers,
> Biju
> 
> > Subject: [PATCH v11 0/5] Add support for RZ/G2L VSPD
> >
> > The RZ/G2L VSPD provides a single VSPD instance. It has the following
> > sub modules MAU, CTU, RPF, DPR, LUT, BRS, WPF and LIF.
> >
> > The VSPD block on RZ/G2L does not have a version register, so added a
> > new compatible string "renesas,r9a07g044-vsp2" with a data pointer
> > containing the info structure. Also the reset line is shared with the
> > DU module.
> >
> > This patch series is tested on RZ/G1N, RZ/G2M and RZ/G2L boards.
> >
> > v10->v11:
> >  * Added poll for reset status in order to avoid lock-up on R-Car Gen2
> >  * with vsp register access after deassert.
> >
> > v9->v10
> >  * Moved {deassert,assert} calls to vsp1_pm_runtime_{resume,suspend}
> >
> > V8->v9
> >  * Added Rb tag from Geert for patch#3
> >  * Replaced break with return info in case a Model match is found and
> >    removed additional check for non-match case.
> >  * Used generic check for matching SoCs with LBA feature.
> >  * Replaced the code comments RZ/G2L {SoC's,SoC} with RZ/G2L SoCs.
> > v7->v8:
> >  * Split the patch for adding s/w version, feature bit and RZ/G2L
> > support
> >  * Added feature bit VSP1_HAS_NON_ZERO_LBA to device_info
> >  * Added .soc for RZ/G2L
> >  * Replaced the compatible "renesas,rzg2l-vsp2" -> "renesas,r9a07g044-
> > vsp2"
> >  * Updated Clock-names to false for non RZ/G2L SoC's on binding doc
> >  * Added Rb tag from Laurent for bindings
> > v6->v7:
> >  * Added Rb tag from Kieran for patch#3
> >  * Added a quirk to handle LIF0 buffer attribute related
> >    changes for V3M and G2L.
> >  * Removed the macro for VSP HW version
> > v5->v6:
> >  * Rebased to media_staging and updated commit header
> >  * Removed LCDC reference clock description from bindings
> >  * Changed the clock name from du.0->aclk from bindings
> >  * Added Rb tag from Laurent for reset patch
> >  * Added forward declaration for struct reset_control
> >  * Updated vsp1_device_get() with changes suggested by Laurent
> >  * Updated error message for reset_control_get form ctrl->control.
> >  * Removed the extra tab from rzg2l_vsp2_device_info
> >  * Changed the function vsp1_lookup->vsp1_lookup_info and
> >    all info match related code moved here.
> >  * Add VI6_IP_VERSION_VSP and VI6_IP_VERSION_VSP_SW macros to
> >    distinguish HW & SW IP_VSP_Version.
> >  * Used 0x80 for RZG2L VSPD model and SoC identification
> >  * Updated Switch() for LIF0 buffer attribute handling.
> > v4->v5:
> >  * Fixed typo VI6_IP_VERSION_MODEL_MASK->VI6_IP_VERSION_MASK
> >  * To be consistent with other SoC's, introduced VI6_IP_VERSION_SOC_G2L
> >    for SoC identification for RZ/G2L SoC's.
> > v3->v4:
> >  * Restored error check for pm_runtime_resume_and_get and calls
> >    assert() in case of failure.
> >  * Added Rb tag from Geert
> >  * Add switch() for LIF0 buffer attribute handling for RZ/G2L and V3M
> > SoC's
> > v2->v3:
> >  * Added Rb tags from Krzysztof and Philipp
> >  * If reset_control_deassert() failed, return ret directly.
> >  * Fixed version comparison in vsp1_lookup()
> > v1->v2:
> >  * Used reference counted reset handle to perform deassert/assert
> >  * Changed the compatible from vsp2-rzg2l->rzg2l-vsp2
> >  * Added standalone device info for rzg2l-vsp2.
> >  * Added vsp1_lookup helper function.
> >  * Updated comments for LIF0 buffer attribute register
> >  * Used last ID for rzg2l-vsp2.
> > RFC->v1:
> >  * Added reset support as separate patch
> >  * Moved rstc just after the bus_master field in struct vsp1_device
> >  * Used data pointer containing info structure to retrieve version
> > information
> >  * Updated commit description
> >  * Changed compatible from vsp2-r9a07g044->vsp2-rzg2l
> >  * Defined the clocks
> >  * Clock max Items is based on SoC Compatible string
> > RFC:
> >  *
> >  *
> >
> > Biju Das (5):
> >   media: dt-bindings: media: renesas,vsp1: Document RZ/G2L VSPD
> bindings
> >   media: renesas: vsp1: Add support to deassert/assert reset line
> >   media: renesas: vsp1: Add support for VSP software version
> >   media: renesas: vsp1: Add VSP1_HAS_NON_ZERO_LBA feature bit
> >   media: renesas: vsp1: Add support for RZ/G2L VSPD
> >
> >  .../bindings/media/renesas,vsp1.yaml          |  53 ++++++---
> >  drivers/media/platform/renesas/vsp1/vsp1.h    |   4 +
> >  .../media/platform/renesas/vsp1/vsp1_drv.c    | 104 +++++++++++++++---
> >  .../media/platform/renesas/vsp1/vsp1_lif.c    |  12 +-
> >  .../media/platform/renesas/vsp1/vsp1_regs.h   |   6 +
> >  5 files changed, 145 insertions(+), 34 deletions(-)
> >
> > --
> > 2.25.1