Message ID | 1449827743-22895-5-git-send-email-tiffany.lin@mediatek.com (mailing list archive) |
---|---|
State | Superseded, archived |
Headers |
Received: from mail.tu-berlin.de ([130.149.7.33]) by www.linuxtv.org with esmtp (Exim 4.84) (envelope-from <linux-media-owner@vger.kernel.org>) id 1a7KTc-0008J6-Nr; Fri, 11 Dec 2015 09:59:00 +0000 X-tubIT-Incoming-IP: 209.132.180.67 Received: from vger.kernel.org ([209.132.180.67]) by mail.tu-berlin.de (exim-4.76/mailfrontend-5) with esmtp id 1a7KTa-0000co-8G; Fri, 11 Dec 2015 10:59:00 +0100 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754739AbbLKJ6e (ORCPT <rfc822;mkrufky@linuxtv.org> + 1 other); Fri, 11 Dec 2015 04:58:34 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:38647 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1754576AbbLKJ4E (ORCPT <rfc822;linux-media@vger.kernel.org>); Fri, 11 Dec 2015 04:56:04 -0500 X-Listener-Flag: 11101 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw01.mediatek.com (envelope-from <tiffany.lin@mediatek.com>) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 560767726; Fri, 11 Dec 2015 17:55:56 +0800 Received: from mtkslt302.mediatek.inc (10.21.14.115) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.266.1; Fri, 11 Dec 2015 17:55:55 +0800 From: Tiffany Lin <tiffany.lin@mediatek.com> To: <daniel.thompson@linaro.org>, Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>, Ian Campbell <ijc+devicetree@hellion.org.uk>, Kumar Gala <galak@codeaurora.org>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will.deacon@arm.com>, Mauro Carvalho Chehab <mchehab@osg.samsung.com>, Matthias Brugger <matthias.bgg@gmail.com>, Daniel Kurtz <djkurtz@chromium.org>, Hans Verkuil <hans.verkuil@cisco.com>, Laurent Pinchart <laurent.pinchart@ideasonboard.com>, Sakari Ailus <sakari.ailus@iki.fi>, Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>, Fabien Dessenne <fabien.dessenne@st.com>, Arnd Bergmann <arnd@arndb.de>, Darren Etheridge <detheridge@ti.com>, Peter Griffin <peter.griffin@linaro.org>, Benoit Parrot <bparrot@ti.com> CC: Tiffany Lin <tiffany.lin@mediatek.com>, Andrew-CT Chen <andrew-ct.chen@mediatek.com>, Eddie Huang <eddie.huang@mediatek.com>, Yingjoe Chen <yingjoe.chen@mediatek.com>, James Liao <jamesjj.liao@mediatek.com>, Hongzhou Yang <hongzhou.yang@mediatek.com>, Daniel Hsiao <daniel.hsiao@mediatek.com>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-media@vger.kernel.org>, <linux-mediatek@lists.infradead.org>, <PoChun.Lin@mediatek.com> Subject: [PATCH v2 4/8] dt-bindings: Add a binding for Mediatek Video Encoder Date: Fri, 11 Dec 2015 17:55:39 +0800 Message-ID: <1449827743-22895-5-git-send-email-tiffany.lin@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1449827743-22895-1-git-send-email-tiffany.lin@mediatek.com> References: <1449827743-22895-1-git-send-email-tiffany.lin@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: <linux-media.vger.kernel.org> X-Mailing-List: linux-media@vger.kernel.org X-PMX-Version: 6.0.0.2142326, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2015.12.11.95116 X-PMX-Spam: Gauge=IIIIIIIII, Probability=9%, Report=' MULTIPLE_RCPTS 0.1, HTML_00_01 0.05, HTML_00_10 0.05, MSGID_ADDED_BY_MTA 0.05, BODY_SIZE_3000_3999 0, BODY_SIZE_5000_LESS 0, BODY_SIZE_7000_LESS 0, NO_URI_HTTPS 0, REFERENCES 0, SINGLE_URI_IN_BODY 0, URI_ENDS_IN_HTML 0, __ANY_URI 0, __CP_MEDIA_BODY 0, __CP_URI_IN_BODY 0, __CT 0, __CT_TEXT_PLAIN 0, __DATE_TZ_HK 0, __HAS_FROM 0, __HAS_MSGID 0, __HAS_X_MAILER 0, __HAS_X_MAILING_LIST 0, __IN_REP_TO 0, __LINES_OF_YELLING 0, __MIME_TEXT_ONLY 0, __MIME_VERSION 0, __MULTIPLE_RCPTS_CC_X2 0, __MULTIPLE_RCPTS_TO_X5 0, __REFERENCES 0, __SANE_MSGID 0, __SINGLE_URI_TEXT 0, __SUBJ_ALPHA_END 0, __TO_MALFORMED_2 0, __TO_NO_NAME 0, __URI_IN_BODY 0, __URI_NO_WWW 0, __URI_NS ' |
Commit Message
Tiffany Lin
Dec. 11, 2015, 9:55 a.m. UTC
Add a DT binding documentation of Video Encoder for the
MT8173 SoC from Mediatek.
Signed-off-by: Tiffany Lin <tiffany.lin@mediatek.com>
---
.../devicetree/bindings/media/mediatek-vcodec.txt | 58 ++++++++++++++++++++
1 file changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/mediatek-vcodec.txt
Comments
On Fri, Dec 11, 2015 at 05:55:39PM +0800, Tiffany Lin wrote: > Add a DT binding documentation of Video Encoder for the > MT8173 SoC from Mediatek. > > Signed-off-by: Tiffany Lin <tiffany.lin@mediatek.com> A question and minor issue below, otherwise: Acked-by: Rob Herring <robh@kernel.org> > --- > .../devicetree/bindings/media/mediatek-vcodec.txt | 58 ++++++++++++++++++++ > 1 file changed, 58 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/mediatek-vcodec.txt > > diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt > new file mode 100644 > index 0000000..510cd81 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt > @@ -0,0 +1,58 @@ > +Mediatek Video Codec > + > +Mediatek Video Codec is the video codec hw present in Mediatek SoCs which > +supports high resolution encoding functionalities. > + > +Required properties: > +- compatible : "mediatek,mt8173-vcodec-enc" for encoder > +- reg : Physical base address of the video codec registers and length of > + memory mapped region. > +- interrupts : interrupt number to the cpu. > +- mediatek,larb : must contain the local arbiters in the current Socs. > +- clocks : list of clock specifiers, corresponding to entries in > + the clock-names property; > +- clock-names: must contain "vencpll", "venc_lt_sel", "vcodecpll_370p5_ck" > +- iommus : list of iommus specifiers should be enabled for hw encode. > + There are 2 cells needed to enable/disable iommu. > + The first one is local arbiter index(larbid), and the other is port > + index(portid) within local arbiter. Specifies the larbid and portid > + as defined in dt-binding/memory/mt8173-larb-port.h. > +- mediatek,vpu : the node of video processor unit > + > +Example: > +vcodec_enc: vcodec@0x18002000 { > + compatible = "mediatek,mt8173-vcodec-enc"; > + reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/ > + <0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/ > + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>, > + <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>; > + larb = <&larb3>, > + <&larb5>; > + iommus = <&iommu M4U_LARB3_ID M4U_PORT_VENC_RCPU>, Is this the same iommu as the VPU? If so, you can't have a mixed number of cells. > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REC>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_BSDMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_SV_COMV>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_RD_COMV>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_LUMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_CHROMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_LUMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_CHROMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_RDMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_WDMA>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RCPU_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_FRM_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_BSDMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_SV_COMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RD_COMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_LUMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_CHROMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REF_LUMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_CHROMA_SET2>; > + vpu = <&vpu>; Need to update the example. > + clocks = <&apmixedsys CLK_APMIXED_VENCPLL>, > + <&topckgen CLK_TOP_VENC_LT_SEL>, > + <&topckgen CLK_TOP_VCODECPLL_370P5>; > + clock-names = "vencpll", > + "venc_lt_sel", > + "vcodecpll_370p5_ck"; > + }; > -- > 1.7.9.5 > -- To unsubscribe from this list: send the line "unsubscribe linux-media" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, 2015-12-11 at 11:29 -0600, Rob Herring wrote: > On Fri, Dec 11, 2015 at 05:55:39PM +0800, Tiffany Lin wrote: > > Add a DT binding documentation of Video Encoder for the > > MT8173 SoC from Mediatek. > > > > Signed-off-by: Tiffany Lin <tiffany.lin@mediatek.com> > > A question and minor issue below, otherwise: > > Acked-by: Rob Herring <robh@kernel.org> > > > --- > > .../devicetree/bindings/media/mediatek-vcodec.txt | 58 ++++++++++++++++++++ > > 1 file changed, 58 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/media/mediatek-vcodec.txt > > > > diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt > > new file mode 100644 > > index 0000000..510cd81 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt > > @@ -0,0 +1,58 @@ > > +Mediatek Video Codec > > + > > +Mediatek Video Codec is the video codec hw present in Mediatek SoCs which > > +supports high resolution encoding functionalities. > > + > > +Required properties: > > +- compatible : "mediatek,mt8173-vcodec-enc" for encoder > > +- reg : Physical base address of the video codec registers and length of > > + memory mapped region. > > +- interrupts : interrupt number to the cpu. > > +- mediatek,larb : must contain the local arbiters in the current Socs. > > +- clocks : list of clock specifiers, corresponding to entries in > > + the clock-names property; > > +- clock-names: must contain "vencpll", "venc_lt_sel", "vcodecpll_370p5_ck" > > +- iommus : list of iommus specifiers should be enabled for hw encode. > > + There are 2 cells needed to enable/disable iommu. > > + The first one is local arbiter index(larbid), and the other is port > > + index(portid) within local arbiter. Specifies the larbid and portid > > + as defined in dt-binding/memory/mt8173-larb-port.h. > > +- mediatek,vpu : the node of video processor unit > > + > > +Example: > > +vcodec_enc: vcodec@0x18002000 { > > + compatible = "mediatek,mt8173-vcodec-enc"; > > + reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/ > > + <0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/ > > + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>, > > + <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>; > > + larb = <&larb3>, > > + <&larb5>; > > + iommus = <&iommu M4U_LARB3_ID M4U_PORT_VENC_RCPU>, > > Is this the same iommu as the VPU? If so, you can't have a mixed number > of cells. Yes, its same iommus as the VPU. Now we use two parameters for iommus. We will fix this in next version. > > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REC>, > > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_BSDMA>, > > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_SV_COMV>, > > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_RD_COMV>, > > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_LUMA>, > > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_CHROMA>, > > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_LUMA>, > > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_CHROMA>, > > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_RDMA>, > > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_WDMA>, > > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RCPU_SET2>, > > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_FRM_SET2>, > > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_BSDMA_SET2>, > > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_SV_COMA_SET2>, > > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RD_COMA_SET2>, > > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_LUMA_SET2>, > > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_CHROMA_SET2>, > > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REF_LUMA_SET2>, > > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_CHROMA_SET2>; > > + vpu = <&vpu>; > > Need to update the example. Sorry, I didn't get it. Do you means update VPU binding document "media/mediatek-vpu.txt"? > > > + clocks = <&apmixedsys CLK_APMIXED_VENCPLL>, > > + <&topckgen CLK_TOP_VENC_LT_SEL>, > > + <&topckgen CLK_TOP_VCODECPLL_370P5>; > > + clock-names = "vencpll", > > + "venc_lt_sel", > > + "vcodecpll_370p5_ck"; > > + }; > > -- > > 1.7.9.5 > > -- To unsubscribe from this list: send the line "unsubscribe linux-media" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 14/12/15 09:26, tiffany lin wrote: > On Fri, 2015-12-11 at 11:29 -0600, Rob Herring wrote: >> On Fri, Dec 11, 2015 at 05:55:39PM +0800, Tiffany Lin wrote: >>> Add a DT binding documentation of Video Encoder for the >>> MT8173 SoC from Mediatek. >>> >>> Signed-off-by: Tiffany Lin <tiffany.lin@mediatek.com> >> >> A question and minor issue below, otherwise: >> >> Acked-by: Rob Herring <robh@kernel.org> >> >>> --- >>> .../devicetree/bindings/media/mediatek-vcodec.txt | 58 ++++++++++++++++++++ >>> 1 file changed, 58 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/media/mediatek-vcodec.txt >>> >>> diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt >>> new file mode 100644 >>> index 0000000..510cd81 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt >>> @@ -0,0 +1,58 @@ >>> +Mediatek Video Codec >>> + >>> +Mediatek Video Codec is the video codec hw present in Mediatek SoCs which >>> +supports high resolution encoding functionalities. >>> + >>> +Required properties: >>> +- compatible : "mediatek,mt8173-vcodec-enc" for encoder >>> +- reg : Physical base address of the video codec registers and length of >>> + memory mapped region. >>> +- interrupts : interrupt number to the cpu. >>> +- mediatek,larb : must contain the local arbiters in the current Socs. This looks strange, shouldn't it be "larb" instead of "mediatek,larb". At least the example does not use the mediatek prefix. >>> +- clocks : list of clock specifiers, corresponding to entries in >>> + the clock-names property; >>> +- clock-names: must contain "vencpll", "venc_lt_sel", "vcodecpll_370p5_ck" >>> +- iommus : list of iommus specifiers should be enabled for hw encode. >>> + There are 2 cells needed to enable/disable iommu. >>> + The first one is local arbiter index(larbid), and the other is port >>> + index(portid) within local arbiter. Specifies the larbid and portid >>> + as defined in dt-binding/memory/mt8173-larb-port.h. >>> +- mediatek,vpu : the node of video processor unit Same here. Regards, Matthias >>> + >>> +Example: >>> +vcodec_enc: vcodec@0x18002000 { >>> + compatible = "mediatek,mt8173-vcodec-enc"; >>> + reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/ >>> + <0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/ >>> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>, >>> + <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>; >>> + larb = <&larb3>, >>> + <&larb5>; >>> + iommus = <&iommu M4U_LARB3_ID M4U_PORT_VENC_RCPU>, >> >> Is this the same iommu as the VPU? If so, you can't have a mixed number >> of cells. > Yes, its same iommus as the VPU. > Now we use two parameters for iommus. > We will fix this in next version. > >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REC>, >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_BSDMA>, >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_SV_COMV>, >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_RD_COMV>, >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_LUMA>, >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_CHROMA>, >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_LUMA>, >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_CHROMA>, >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_RDMA>, >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_WDMA>, >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RCPU_SET2>, >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_FRM_SET2>, >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_BSDMA_SET2>, >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_SV_COMA_SET2>, >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RD_COMA_SET2>, >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_LUMA_SET2>, >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_CHROMA_SET2>, >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REF_LUMA_SET2>, >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_CHROMA_SET2>; >>> + vpu = <&vpu>; >> >> Need to update the example. > Sorry, I didn't get it. > Do you means update VPU binding document "media/mediatek-vpu.txt"? > >> >>> + clocks = <&apmixedsys CLK_APMIXED_VENCPLL>, >>> + <&topckgen CLK_TOP_VENC_LT_SEL>, >>> + <&topckgen CLK_TOP_VCODECPLL_370P5>; >>> + clock-names = "vencpll", >>> + "venc_lt_sel", >>> + "vcodecpll_370p5_ck"; >>> + }; >>> -- >>> 1.7.9.5 >>> > > -- To unsubscribe from this list: send the line "unsubscribe linux-media" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Matthias, On Mon, 2015-12-14 at 12:36 +0100, Matthias Brugger wrote: > > On 14/12/15 09:26, tiffany lin wrote: > > On Fri, 2015-12-11 at 11:29 -0600, Rob Herring wrote: > >> On Fri, Dec 11, 2015 at 05:55:39PM +0800, Tiffany Lin wrote: > >>> Add a DT binding documentation of Video Encoder for the > >>> MT8173 SoC from Mediatek. > >>> > >>> Signed-off-by: Tiffany Lin <tiffany.lin@mediatek.com> > >> > >> A question and minor issue below, otherwise: > >> > >> Acked-by: Rob Herring <robh@kernel.org> > >> > >>> --- > >>> .../devicetree/bindings/media/mediatek-vcodec.txt | 58 ++++++++++++++++++++ > >>> 1 file changed, 58 insertions(+) > >>> create mode 100644 Documentation/devicetree/bindings/media/mediatek-vcodec.txt > >>> > >>> diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt > >>> new file mode 100644 > >>> index 0000000..510cd81 > >>> --- /dev/null > >>> +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt > >>> @@ -0,0 +1,58 @@ > >>> +Mediatek Video Codec > >>> + > >>> +Mediatek Video Codec is the video codec hw present in Mediatek SoCs which > >>> +supports high resolution encoding functionalities. > >>> + > >>> +Required properties: > >>> +- compatible : "mediatek,mt8173-vcodec-enc" for encoder > >>> +- reg : Physical base address of the video codec registers and length of > >>> + memory mapped region. > >>> +- interrupts : interrupt number to the cpu. > >>> +- mediatek,larb : must contain the local arbiters in the current Socs. > > This looks strange, shouldn't it be "larb" instead of "mediatek,larb". > At least the example does not use the mediatek prefix. > We plan to change larb and vpu to mediate,larb and mediatek,vpu. We will fix this unmatch issue in next version. best regards, Tiffany > >>> +- clocks : list of clock specifiers, corresponding to entries in > >>> + the clock-names property; > >>> +- clock-names: must contain "vencpll", "venc_lt_sel", "vcodecpll_370p5_ck" > >>> +- iommus : list of iommus specifiers should be enabled for hw encode. > >>> + There are 2 cells needed to enable/disable iommu. > >>> + The first one is local arbiter index(larbid), and the other is port > >>> + index(portid) within local arbiter. Specifies the larbid and portid > >>> + as defined in dt-binding/memory/mt8173-larb-port.h. > >>> +- mediatek,vpu : the node of video processor unit > > Same here. > > Regards, > Matthias > > >>> + > >>> +Example: > >>> +vcodec_enc: vcodec@0x18002000 { > >>> + compatible = "mediatek,mt8173-vcodec-enc"; > >>> + reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/ > >>> + <0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/ > >>> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>, > >>> + <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>; > >>> + larb = <&larb3>, > >>> + <&larb5>; > >>> + iommus = <&iommu M4U_LARB3_ID M4U_PORT_VENC_RCPU>, > >> > >> Is this the same iommu as the VPU? If so, you can't have a mixed number > >> of cells. > > Yes, its same iommus as the VPU. > > Now we use two parameters for iommus. > > We will fix this in next version. > > > >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REC>, > >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_BSDMA>, > >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_SV_COMV>, > >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_RD_COMV>, > >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_LUMA>, > >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_CHROMA>, > >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_LUMA>, > >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_CHROMA>, > >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_RDMA>, > >>> + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_WDMA>, > >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RCPU_SET2>, > >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_FRM_SET2>, > >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_BSDMA_SET2>, > >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_SV_COMA_SET2>, > >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RD_COMA_SET2>, > >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_LUMA_SET2>, > >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_CHROMA_SET2>, > >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REF_LUMA_SET2>, > >>> + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_CHROMA_SET2>; > >>> + vpu = <&vpu>; > >> > >> Need to update the example. > > Sorry, I didn't get it. > > Do you means update VPU binding document "media/mediatek-vpu.txt"? > > > >> > >>> + clocks = <&apmixedsys CLK_APMIXED_VENCPLL>, > >>> + <&topckgen CLK_TOP_VENC_LT_SEL>, > >>> + <&topckgen CLK_TOP_VCODECPLL_370P5>; > >>> + clock-names = "vencpll", > >>> + "venc_lt_sel", > >>> + "vcodecpll_370p5_ck"; > >>> + }; > >>> -- > >>> 1.7.9.5 > >>> > > > > -- To unsubscribe from this list: send the line "unsubscribe linux-media" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt new file mode 100644 index 0000000..510cd81 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt @@ -0,0 +1,58 @@ +Mediatek Video Codec + +Mediatek Video Codec is the video codec hw present in Mediatek SoCs which +supports high resolution encoding functionalities. + +Required properties: +- compatible : "mediatek,mt8173-vcodec-enc" for encoder +- reg : Physical base address of the video codec registers and length of + memory mapped region. +- interrupts : interrupt number to the cpu. +- mediatek,larb : must contain the local arbiters in the current Socs. +- clocks : list of clock specifiers, corresponding to entries in + the clock-names property; +- clock-names: must contain "vencpll", "venc_lt_sel", "vcodecpll_370p5_ck" +- iommus : list of iommus specifiers should be enabled for hw encode. + There are 2 cells needed to enable/disable iommu. + The first one is local arbiter index(larbid), and the other is port + index(portid) within local arbiter. Specifies the larbid and portid + as defined in dt-binding/memory/mt8173-larb-port.h. +- mediatek,vpu : the node of video processor unit + +Example: +vcodec_enc: vcodec@0x18002000 { + compatible = "mediatek,mt8173-vcodec-enc"; + reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/ + <0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/ + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>; + larb = <&larb3>, + <&larb5>; + iommus = <&iommu M4U_LARB3_ID M4U_PORT_VENC_RCPU>, + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REC>, + <&iommu M4U_LARB3_ID M4U_PORT_VENC_BSDMA>, + <&iommu M4U_LARB3_ID M4U_PORT_VENC_SV_COMV>, + <&iommu M4U_LARB3_ID M4U_PORT_VENC_RD_COMV>, + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_LUMA>, + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_CHROMA>, + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_LUMA>, + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_CHROMA>, + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_RDMA>, + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_WDMA>, + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RCPU_SET2>, + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_FRM_SET2>, + <&iommu M4U_LARB5_ID M4U_PORT_VENC_BSDMA_SET2>, + <&iommu M4U_LARB5_ID M4U_PORT_VENC_SV_COMA_SET2>, + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RD_COMA_SET2>, + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_LUMA_SET2>, + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_CHROMA_SET2>, + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REF_LUMA_SET2>, + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_CHROMA_SET2>; + vpu = <&vpu>; + clocks = <&apmixedsys CLK_APMIXED_VENCPLL>, + <&topckgen CLK_TOP_VENC_LT_SEL>, + <&topckgen CLK_TOP_VCODECPLL_370P5>; + clock-names = "vencpll", + "venc_lt_sel", + "vcodecpll_370p5_ck"; + };