[RESEND,v3,3/5] clk: qcom: gdsc: Add set and get hwmode callbacks to switch GDSC mode
Message ID | 20231101-gdsc-hwctrl-v3-3-0740ae6b2b04@linaro.org (mailing list archive) |
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State | Superseded |
Headers |
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Wysocki" <rafael@kernel.org>, Kevin Hilman <khilman@kernel.org>, Ulf Hansson <ulf.hansson@linaro.org>, Pavel Machek <pavel@ucw.cz>, Len Brown <len.brown@intel.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Bjorn Andersson <andersson@kernel.org>, Andy Gross <agross@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Stanimir Varbanov <stanimir.k.varbanov@gmail.com>, Vikash Garodia <quic_vgarodia@quicinc.com>, Bryan O'Donoghue <bryan.odonoghue@linaro.org>, Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Taniya Das <tdas@qti.qualcomm.com>, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-media@vger.kernel.org, Abel Vesa <abel.vesa@linaro.org>, Jagadeesh Kona <quic_jkona@quicinc.com> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3005; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=dmM9Qksk+QeZ3gA1LIqXc2D7T/oP/OYmfjqi8kIlD9c=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBlQhSQGvrYdhdnKHK9C8Ljnoq6z1YGTD3WeM0a9 Zk3qYpNlUyJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZUIUkAAKCRAbX0TJAJUV VtnmD/0UKZWZWFdfjBII/4cQuPdLRDcbr5BdbRtGanjzTq6dReA8MnnIBghStcaoCJ4u5AKfcHX WM7bz7LU+ccIMzYTNjWjLxMUJO1qmo+A4QtbbQY7IugpTbIaIgzgS7vfdwkQpnUuKHd9brv/udl TEX//HErRiDpdwD9NwVZXcthR8KxtCh5GTt71S+psbNSZ0kVp2i/Px2Uh2MbSA1YnrDHTSXR+ka bv4KaxWPgxObVscLZsC9Jk81n2uYoGv0LfdkgUWUCwIR2cZXNAME2fGJTdS75FBur+OaGf8yt1f CSrzFttgKvlt/2pvDTE06M5H0nHNworLkdElYli3DZqK0+pXpNjDMqriT+aOOinBzv/LUml8odH bGjWK4sspwzwuu4Oh8CrP85/GgrE9+LsAPPbU3frUhLgMAV8kqvXU4fLHw4flOV20CKSwxFvbcz 4N6vti39r7/29yMVv7RONzaW1KkPidwW9MAAHxMnrR/nlgZ7cgNw7QA6VOaVoDcUcNtOeM1aFyi CAvr+oLnH0iugXwmS225z3lFyRyStZFZjgxQrpLkexQFRgnncMCpDCIRnB2P7TAmCfAvCUCoXCh bCNpeAr1s4f78U4gWlBP2f1u3807HWhKmXEi28b6U9Zs8jKGeQ8hn4prTFgN2XtyvU73WJ9jfUv bsFOsi0ykM7IyHw== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-media.vger.kernel.org> X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -4.8 (----) X-LSpam-Report: No, score=-4.8 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_MED=-2.3 autolearn=ham autolearn_force=no |
Series |
PM: domains: Add control for switching back and forth to HW control
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Commit Message
Abel Vesa
Nov. 1, 2023, 9:04 a.m. UTC
From: Jagadeesh Kona <quic_jkona@quicinc.com> Add support for set and get hwmode callbacks to switch the GDSC between SW and HW modes. Currently, the GDSC is moved to HW control mode using HW_CTRL flag and if this flag is present, GDSC is moved to HW mode as part of GDSC enable itself. The intention is to keep the HW_CTRL flag functionality as is, since many older chipsets still use this flag. Introduce a new HW_CTRL_TRIGGER flag to switch the GDSC back and forth between HW/SW modes dynamically at runtime. If HW_CTRL_TRIGGER flag is present, register set_hwmode_dev callback to switch the GDSC mode which can be invoked from consumer drivers using dev_pm_genpd_set_hwmode function. Unlike HW_CTRL flag, HW_CTRL_TRIGGER won't move the GDSC to HW control mode as part of GDSC enable itself, GDSC will be moved to HW control mode only when consumer driver explicity calls dev_pm_genpd_set_hwmode to switch to HW mode. Also add the dev_pm_genpd_get_hwmode to allow the consumers to read the actual HW/SW mode from hardware. Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- drivers/clk/qcom/gdsc.c | 32 ++++++++++++++++++++++++++++++++ drivers/clk/qcom/gdsc.h | 1 + 2 files changed, 33 insertions(+)
Comments
On Wed, 1 Nov 2023 at 11:06, Abel Vesa <abel.vesa@linaro.org> wrote: > > From: Jagadeesh Kona <quic_jkona@quicinc.com> > > Add support for set and get hwmode callbacks to switch the GDSC between > SW and HW modes. Currently, the GDSC is moved to HW control mode > using HW_CTRL flag and if this flag is present, GDSC is moved to HW > mode as part of GDSC enable itself. The intention is to keep the > HW_CTRL flag functionality as is, since many older chipsets still use > this flag. > > Introduce a new HW_CTRL_TRIGGER flag to switch the GDSC back and forth > between HW/SW modes dynamically at runtime. If HW_CTRL_TRIGGER flag is > present, register set_hwmode_dev callback to switch the GDSC mode which > can be invoked from consumer drivers using dev_pm_genpd_set_hwmode > function. Unlike HW_CTRL flag, HW_CTRL_TRIGGER won't move the GDSC to HW > control mode as part of GDSC enable itself, GDSC will be moved to HW > control mode only when consumer driver explicity calls > dev_pm_genpd_set_hwmode to switch to HW mode. Also add the > dev_pm_genpd_get_hwmode to allow the consumers to read the actual > HW/SW mode from hardware. Can we add two new flags: - HW_CTRL_TRIGGER - DEFAULT_HW_TRIGGER And then define HW_CTRL as HW_CTRL_TRIGGER | DEFAULT_HW_TRIGGER ? This way older platforms will keep existing behaviour, but can gradually migrate to the new callbacks? > > Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > drivers/clk/qcom/gdsc.c | 32 ++++++++++++++++++++++++++++++++ > drivers/clk/qcom/gdsc.h | 1 + > 2 files changed, 33 insertions(+) > > diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c > index 5358e28122ab..c763524cd5da 100644 > --- a/drivers/clk/qcom/gdsc.c > +++ b/drivers/clk/qcom/gdsc.c > @@ -363,6 +363,34 @@ static int gdsc_disable(struct generic_pm_domain *domain) > return 0; > } > > +static int gdsc_set_hwmode(struct generic_pm_domain *domain, struct device *dev, bool mode) > +{ > + struct gdsc *sc = domain_to_gdsc(domain); > + > + if (sc->rsupply && !regulator_is_enabled(sc->rsupply)) { > + pr_err("Cannot set mode while parent is disabled\n"); > + return -EIO; > + } > + > + return gdsc_hwctrl(sc, mode); > +} > + > +static bool gdsc_get_hwmode(struct generic_pm_domain *domain, struct device *dev) > +{ > + struct gdsc *sc = domain_to_gdsc(domain); > + u32 val; > + int ret; > + > + ret = regmap_read(sc->regmap, sc->gdscr, &val); > + if (ret) > + return ret; > + > + if (val & HW_CONTROL_MASK) > + return true; > + > + return false; > +} > + > static int gdsc_init(struct gdsc *sc) > { > u32 mask, val; > @@ -451,6 +479,10 @@ static int gdsc_init(struct gdsc *sc) > sc->pd.power_off = gdsc_disable; > if (!sc->pd.power_on) > sc->pd.power_on = gdsc_enable; > + if (sc->flags & HW_CTRL_TRIGGER) { > + sc->pd.set_hwmode_dev = gdsc_set_hwmode; > + sc->pd.get_hwmode_dev = gdsc_get_hwmode; > + } > > ret = pm_genpd_init(&sc->pd, NULL, !on); > if (ret) > diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h > index 803512688336..1e2779b823d1 100644 > --- a/drivers/clk/qcom/gdsc.h > +++ b/drivers/clk/qcom/gdsc.h > @@ -67,6 +67,7 @@ struct gdsc { > #define ALWAYS_ON BIT(6) > #define RETAIN_FF_ENABLE BIT(7) > #define NO_RET_PERIPH BIT(8) > +#define HW_CTRL_TRIGGER BIT(9) > struct reset_controller_dev *rcdev; > unsigned int *resets; > unsigned int reset_count; > > -- > 2.34.1 >
On 11/2/2023 2:58 AM, Dmitry Baryshkov wrote: > On Wed, 1 Nov 2023 at 11:06, Abel Vesa <abel.vesa@linaro.org> wrote: >> >> From: Jagadeesh Kona <quic_jkona@quicinc.com> >> >> Add support for set and get hwmode callbacks to switch the GDSC between >> SW and HW modes. Currently, the GDSC is moved to HW control mode >> using HW_CTRL flag and if this flag is present, GDSC is moved to HW >> mode as part of GDSC enable itself. The intention is to keep the >> HW_CTRL flag functionality as is, since many older chipsets still use >> this flag. >> >> Introduce a new HW_CTRL_TRIGGER flag to switch the GDSC back and forth >> between HW/SW modes dynamically at runtime. If HW_CTRL_TRIGGER flag is >> present, register set_hwmode_dev callback to switch the GDSC mode which >> can be invoked from consumer drivers using dev_pm_genpd_set_hwmode >> function. Unlike HW_CTRL flag, HW_CTRL_TRIGGER won't move the GDSC to HW >> control mode as part of GDSC enable itself, GDSC will be moved to HW >> control mode only when consumer driver explicity calls >> dev_pm_genpd_set_hwmode to switch to HW mode. Also add the >> dev_pm_genpd_get_hwmode to allow the consumers to read the actual >> HW/SW mode from hardware. > > Can we add two new flags: > - HW_CTRL_TRIGGER > - DEFAULT_HW_TRIGGER > > And then define HW_CTRL as HW_CTRL_TRIGGER | DEFAULT_HW_TRIGGER ? > > This way older platforms will keep existing behaviour, but can > gradually migrate to the new callbacks? > Thanks Dmitry for your review, The current usecases we have for GDSC's are either use the existing HW_CTRL flag to switch the GDSC to HW mode in gdsc_enable() and back to SW mode in gdsc_disable(). The second usecase is don't switch GDSC mode in gdsc_enable() & gdsc_disable() at all, and switch the GDSC mode only in new callbacks when consumers explicitly request it using dev_pm_genpd_set_hwmode(), this can be achieved using the new HW_CTRL_TRIGGER flag. By defining HW_CTRL as HW_CTRL_TRIGGER | DEFAULT_HW_TRIGGER, it switches the GDSC mode both in enable & disable callbacks and in new callbacks as well. But we currently don't have any usecase that requires this behaviour. Thanks, Jagadeesh >> >> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> >> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> >> --- >> drivers/clk/qcom/gdsc.c | 32 ++++++++++++++++++++++++++++++++ >> drivers/clk/qcom/gdsc.h | 1 + >> 2 files changed, 33 insertions(+) >> >> diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c >> index 5358e28122ab..c763524cd5da 100644 >> --- a/drivers/clk/qcom/gdsc.c >> +++ b/drivers/clk/qcom/gdsc.c >> @@ -363,6 +363,34 @@ static int gdsc_disable(struct generic_pm_domain *domain) >> return 0; >> } >> >> +static int gdsc_set_hwmode(struct generic_pm_domain *domain, struct device *dev, bool mode) >> +{ >> + struct gdsc *sc = domain_to_gdsc(domain); >> + >> + if (sc->rsupply && !regulator_is_enabled(sc->rsupply)) { >> + pr_err("Cannot set mode while parent is disabled\n"); >> + return -EIO; >> + } >> + >> + return gdsc_hwctrl(sc, mode); >> +} >> + >> +static bool gdsc_get_hwmode(struct generic_pm_domain *domain, struct device *dev) >> +{ >> + struct gdsc *sc = domain_to_gdsc(domain); >> + u32 val; >> + int ret; >> + >> + ret = regmap_read(sc->regmap, sc->gdscr, &val); >> + if (ret) >> + return ret; >> + >> + if (val & HW_CONTROL_MASK) >> + return true; >> + >> + return false; >> +} >> + >> static int gdsc_init(struct gdsc *sc) >> { >> u32 mask, val; >> @@ -451,6 +479,10 @@ static int gdsc_init(struct gdsc *sc) >> sc->pd.power_off = gdsc_disable; >> if (!sc->pd.power_on) >> sc->pd.power_on = gdsc_enable; >> + if (sc->flags & HW_CTRL_TRIGGER) { >> + sc->pd.set_hwmode_dev = gdsc_set_hwmode; >> + sc->pd.get_hwmode_dev = gdsc_get_hwmode; >> + } >> >> ret = pm_genpd_init(&sc->pd, NULL, !on); >> if (ret) >> diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h >> index 803512688336..1e2779b823d1 100644 >> --- a/drivers/clk/qcom/gdsc.h >> +++ b/drivers/clk/qcom/gdsc.h >> @@ -67,6 +67,7 @@ struct gdsc { >> #define ALWAYS_ON BIT(6) >> #define RETAIN_FF_ENABLE BIT(7) >> #define NO_RET_PERIPH BIT(8) >> +#define HW_CTRL_TRIGGER BIT(9) >> struct reset_controller_dev *rcdev; >> unsigned int *resets; >> unsigned int reset_count; >> >> -- >> 2.34.1 >> > >
diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index 5358e28122ab..c763524cd5da 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -363,6 +363,34 @@ static int gdsc_disable(struct generic_pm_domain *domain) return 0; } +static int gdsc_set_hwmode(struct generic_pm_domain *domain, struct device *dev, bool mode) +{ + struct gdsc *sc = domain_to_gdsc(domain); + + if (sc->rsupply && !regulator_is_enabled(sc->rsupply)) { + pr_err("Cannot set mode while parent is disabled\n"); + return -EIO; + } + + return gdsc_hwctrl(sc, mode); +} + +static bool gdsc_get_hwmode(struct generic_pm_domain *domain, struct device *dev) +{ + struct gdsc *sc = domain_to_gdsc(domain); + u32 val; + int ret; + + ret = regmap_read(sc->regmap, sc->gdscr, &val); + if (ret) + return ret; + + if (val & HW_CONTROL_MASK) + return true; + + return false; +} + static int gdsc_init(struct gdsc *sc) { u32 mask, val; @@ -451,6 +479,10 @@ static int gdsc_init(struct gdsc *sc) sc->pd.power_off = gdsc_disable; if (!sc->pd.power_on) sc->pd.power_on = gdsc_enable; + if (sc->flags & HW_CTRL_TRIGGER) { + sc->pd.set_hwmode_dev = gdsc_set_hwmode; + sc->pd.get_hwmode_dev = gdsc_get_hwmode; + } ret = pm_genpd_init(&sc->pd, NULL, !on); if (ret) diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index 803512688336..1e2779b823d1 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -67,6 +67,7 @@ struct gdsc { #define ALWAYS_ON BIT(6) #define RETAIN_FF_ENABLE BIT(7) #define NO_RET_PERIPH BIT(8) +#define HW_CTRL_TRIGGER BIT(9) struct reset_controller_dev *rcdev; unsigned int *resets; unsigned int reset_count;