[v7,15/16] dt-bindings: display: mediatek: split: add compatible for MT8195
Commit Message
Add compatible string and GCE property for MT8195 SPLIT, of
which is operated by MDP3.
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
---
.../display/mediatek/mediatek,split.yaml | 27 +++++++++++++++++++
1 file changed, 27 insertions(+)
Comments
On 12/10/2023 10:40, Moudy Ho wrote:
> Add compatible string and GCE property for MT8195 SPLIT, of
> which is operated by MDP3.
>
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: mediatek,mt8195-mdp3-split
> +
> + then:
> + required:
> + - mediatek,gce-client-reg
else:
mediatek,gce-client-reg: false
> +
> additionalProperties: false
>
> examples:
Best regards,
Krzysztof
Il 13/10/23 08:52, Krzysztof Kozlowski ha scritto:
> On 12/10/2023 10:40, Moudy Ho wrote:
>> Add compatible string and GCE property for MT8195 SPLIT, of
>> which is operated by MDP3.
>>
>> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
>
>
>> +allOf:
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + const: mediatek,mt8195-mdp3-split
>> +
>> + then:
>> + required:
>> + - mediatek,gce-client-reg
>
> else:
> mediatek,gce-client-reg: false
>
>
Technically, all of the display components do support GCE, using it is
a matter of preference, so disallowing gce-client-reg on anything that
is not mt8195-mdp3-split is *technically* wrong, as much as not having
that from the beginning was also technically wrong... :-)
P.S.: The driver for the display split component doesn't use GCE yet,
only mdp3 for now, but again, it's the driver - while the HW is actually
capable of using that
Cheers,
Angelo
>> +
>> additionalProperties: false
>>
>> examples:
>
> Best regards,
> Krzysztof
>
On 16/10/2023 10:01, AngeloGioacchino Del Regno wrote:
> Il 13/10/23 08:52, Krzysztof Kozlowski ha scritto:
>> On 12/10/2023 10:40, Moudy Ho wrote:
>>> Add compatible string and GCE property for MT8195 SPLIT, of
>>> which is operated by MDP3.
>>>
>>> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
>>
>>
>>> +allOf:
>>> + - if:
>>> + properties:
>>> + compatible:
>>> + contains:
>>> + const: mediatek,mt8195-mdp3-split
>>> +
>>> + then:
>>> + required:
>>> + - mediatek,gce-client-reg
>>
>> else:
>> mediatek,gce-client-reg: false
>>
>>
>
> Technically, all of the display components do support GCE, using it is
> a matter of preference, so disallowing gce-client-reg on anything that
> is not mt8195-mdp3-split is *technically* wrong, as much as not having
> that from the beginning was also technically wrong... :-)
>
> P.S.: The driver for the display split component doesn't use GCE yet,
> only mdp3 for now, but again, it's the driver - while the HW is actually
> capable of using that
Hm, fine with me then.
Best regards,
Krzysztof
On 12/10/2023 10:40, Moudy Ho wrote:
> Add compatible string and GCE property for MT8195 SPLIT, of
> which is operated by MDP3.
>
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> ---
After feedback from Angelo:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
Il 16/10/23 18:21, Krzysztof Kozlowski ha scritto:
> On 12/10/2023 10:40, Moudy Ho wrote:
>> Add compatible string and GCE property for MT8195 SPLIT, of
>> which is operated by MDP3.
>>
>> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
>> ---
>
> After feedback from Angelo:
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
@@ -23,6 +23,7 @@ properties:
oneOf:
- enum:
- mediatek,mt8173-disp-split
+ - mediatek,mt8195-mdp3-split
- items:
- const: mediatek,mt6795-disp-split
- const: mediatek,mt8173-disp-split
@@ -38,6 +39,21 @@ properties:
the power controller specified by phandle. See
Documentation/devicetree/bindings/power/power-domain.yaml for details.
+ mediatek,gce-client-reg:
+ description:
+ The register of display function block to be set by gce. There are 4 arguments,
+ such as gce node, subsys id, offset and register size. The subsys id that is
+ mapping to the register of display function blocks is defined in the gce header
+ include/dt-bindings/gce/<chip>-gce.h of each chips.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: phandle of GCE
+ - description: GCE subsys id
+ - description: register offset
+ - description: register size
+ maxItems: 1
+
clocks:
items:
- description: SPLIT Clock
@@ -48,6 +64,17 @@ required:
- power-domains
- clocks
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: mediatek,mt8195-mdp3-split
+
+ then:
+ required:
+ - mediatek,gce-client-reg
+
additionalProperties: false
examples: