[v6,10/16] dt-bindings: media: mediatek: mdp3: add component TDSHP for MT8195
Commit Message
Add the fundamental hardware configuration of component TDSHP,
which is controlled by MDP3 on MT8195.
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
---
.../bindings/media/mediatek,mdp3-tdshp.yaml | 61 +++++++++++++++++++
1 file changed, 61 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml
Comments
On 22/09/2023 09:21, Moudy Ho wrote:
> Add the fundamental hardware configuration of component TDSHP,
> which is controlled by MDP3 on MT8195.
>
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> ---
> .../bindings/media/mediatek,mdp3-tdshp.yaml | 61 +++++++++++++++++++
> 1 file changed, 61 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml
>
> diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml
> new file mode 100644
> index 000000000000..0ac904cbc2c0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml
> @@ -0,0 +1,61 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Media Data Path 3 TDSHP
> +
> +maintainers:
> + - Matthias Brugger <matthias.bgg@gmail.com>
> + - Moudy Ho <moudy.ho@mediatek.com>
> +
> +description:
> + One of Media Data Path 3 (MDP3) components used to improve image
> + sharpness and contrast.
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt8195-mdp3-tdshp
> +
> + reg:
> + maxItems: 1
> +
> + mediatek,gce-client-reg:
> + description:
> + The register of display function block to be set by gce. There are 4 arguments,
> + such as gce node, subsys id, offset and register size. The subsys id that is
> + mapping to the register of display function blocks is defined in the gce header
> + include/dt-bindings/gce/<chip>-gce.h of each chips.
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + items:
> + - description: phandle of GCE
> + - description: GCE subsys id
> + - description: register offset
> + - description: register size
> + maxItems: 1
> +
> + clocks:
> + minItems: 1
NAK. So you ignored all the review. Brilliant.
I am getting fed up with Mediatek's approach. It's not the first time.
Best regards,
Krzysztof
On Sat, 2023-09-23 at 19:34 +0200, Krzysztof Kozlowski wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> On 22/09/2023 09:21, Moudy Ho wrote:
> > Add the fundamental hardware configuration of component TDSHP,
> > which is controlled by MDP3 on MT8195.
> >
> > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> > ---
> > .../bindings/media/mediatek,mdp3-tdshp.yaml | 61
> +++++++++++++++++++
> > 1 file changed, 61 insertions(+)
> > create mode 100644
> Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-
> tdshp.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-
> tdshp.yaml
> > new file mode 100644
> > index 000000000000..0ac904cbc2c0
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-
> tdshp.yaml
> > @@ -0,0 +1,61 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek Media Data Path 3 TDSHP
> > +
> > +maintainers:
> > + - Matthias Brugger <matthias.bgg@gmail.com>
> > + - Moudy Ho <moudy.ho@mediatek.com>
> > +
> > +description:
> > + One of Media Data Path 3 (MDP3) components used to improve image
> > + sharpness and contrast.
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - mediatek,mt8195-mdp3-tdshp
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + mediatek,gce-client-reg:
> > + description:
> > + The register of display function block to be set by gce.
> There are 4 arguments,
> > + such as gce node, subsys id, offset and register size. The
> subsys id that is
> > + mapping to the register of display function blocks is
> defined in the gce header
> > + include/dt-bindings/gce/<chip>-gce.h of each chips.
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + items:
> > + items:
> > + - description: phandle of GCE
> > + - description: GCE subsys id
> > + - description: register offset
> > + - description: register size
> > + maxItems: 1
> > +
> > + clocks:
> > + minItems: 1
>
> NAK. So you ignored all the review. Brilliant.
>
> I am getting fed up with Mediatek's approach. It's not the first
> time.
>
> Best regards,
> Krzysztof
>
Hi Krzysztof,
I apologize sincerely for overlooking despite your multiple reminders.
To prevent similar incidents, I will ensure a thorough scrutiny of
everything in question. I genuinely appreciate your patient review and
deeply regret any inconvenience this may have caused you.
Sincerely,
Moudy
new file mode 100644
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Media Data Path 3 TDSHP
+
+maintainers:
+ - Matthias Brugger <matthias.bgg@gmail.com>
+ - Moudy Ho <moudy.ho@mediatek.com>
+
+description:
+ One of Media Data Path 3 (MDP3) components used to improve image
+ sharpness and contrast.
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8195-mdp3-tdshp
+
+ reg:
+ maxItems: 1
+
+ mediatek,gce-client-reg:
+ description:
+ The register of display function block to be set by gce. There are 4 arguments,
+ such as gce node, subsys id, offset and register size. The subsys id that is
+ mapping to the register of display function blocks is defined in the gce header
+ include/dt-bindings/gce/<chip>-gce.h of each chips.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: phandle of GCE
+ - description: GCE subsys id
+ - description: register offset
+ - description: register size
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+
+required:
+ - compatible
+ - reg
+ - mediatek,gce-client-reg
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8195-clk.h>
+ #include <dt-bindings/gce/mt8195-gce.h>
+
+ display@14007000 {
+ compatible = "mediatek,mt8195-mdp3-tdshp";
+ reg = <0x14007000 0x1000>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>;
+ clocks = <&vppsys0 CLK_VPP0_MDP_TDSHP>;
+ };