Message ID | 20230705172759.1610753-8-gatien.chevallier@foss.st.com (mailing list archive) |
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State | Not Applicable |
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Wed, 5 Jul 2023 19:29:47 +0200 (CEST) Received: from localhost (10.201.21.121) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 5 Jul 2023 19:29:46 +0200 From: Gatien Chevallier <gatien.chevallier@foss.st.com> To: <Oleksii_Moisieiev@epam.com>, <gregkh@linuxfoundation.org>, <herbert@gondor.apana.org.au>, <davem@davemloft.net>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <alexandre.torgue@foss.st.com>, <vkoul@kernel.org>, <jic23@kernel.org>, <olivier.moysan@foss.st.com>, <arnaud.pouliquen@foss.st.com>, <mchehab@kernel.org>, <fabrice.gasnier@foss.st.com>, <andi.shyti@kernel.org>, <ulf.hansson@linaro.org>, <edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>, <hugues.fruchet@foss.st.com>, <lee@kernel.org>, <will@kernel.org>, <catalin.marinas@arm.com>, <arnd@kernel.org>, <richardcochran@gmail.com> CC: <linux-crypto@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <dmaengine@vger.kernel.org>, <linux-i2c@vger.kernel.org>, <linux-iio@vger.kernel.org>, <alsa-devel@alsa-project.org>, <linux-media@vger.kernel.org>, <linux-mmc@vger.kernel.org>, <netdev@vger.kernel.org>, <linux-phy@lists.infradead.org>, <linux-serial@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-usb@vger.kernel.org>, Gatien Chevallier <gatien.chevallier@foss.st.com> Subject: [PATCH 07/10] arm64: dts: st: add RIFSC as a domain controller for STM32MP25x boards Date: Wed, 5 Jul 2023 19:27:56 +0200 Message-ID: <20230705172759.1610753-8-gatien.chevallier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230705172759.1610753-1-gatien.chevallier@foss.st.com> References: <20230705172759.1610753-1-gatien.chevallier@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.201.21.121] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-05_09,2023-07-05_01,2023-05-22_02 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-media.vger.kernel.org> X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -4.8 (----) X-LSpam-Report: No, score=-4.8 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_MED=-2.3 autolearn=ham autolearn_force=no |
Series |
Introduce STM32 Firewall framework
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Commit Message
Gatien Chevallier
July 5, 2023, 5:27 p.m. UTC
RIFSC is a firewall controller. Change its compatible so that is matches
the documentation and reference RIFSC as a feature-domain-controller.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
Comments
Hi Gatien On 7/5/23 19:27, Gatien Chevallier wrote: > RIFSC is a firewall controller. Change its compatible so that is matches > the documentation and reference RIFSC as a feature-domain-controller. > > Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> > --- > arch/arm64/boot/dts/st/stm32mp251.dtsi | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi > index 5268a4321841..62101084cab8 100644 > --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi > +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi > @@ -106,17 +106,20 @@ soc@0 { > ranges = <0x0 0x0 0x0 0x80000000>; > > rifsc: rifsc-bus@42080000 { > - compatible = "simple-bus"; > + compatible = "st,stm32mp25-rifsc"; You could keep "simple-bus" compatible (in second position). In case of the RIFSC is not probed, the platform will be able to boot. If you agree you can use the same for ETZPC. Cheers Alex > reg = <0x42080000 0x1000>; > #address-cells = <1>; > #size-cells = <1>; > ranges; > + feature-domain-controller; > + #feature-domain-cells = <1>; > > usart2: serial@400e0000 { > compatible = "st,stm32h7-uart"; > reg = <0x400e0000 0x400>; > interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&ck_flexgen_08>; > + feature-domains = <&rifsc 32>; > status = "disabled"; > }; > };
Hi Alex, On 7/6/23 11:25, Alexandre TORGUE wrote: > Hi Gatien > > On 7/5/23 19:27, Gatien Chevallier wrote: >> RIFSC is a firewall controller. Change its compatible so that is matches >> the documentation and reference RIFSC as a feature-domain-controller. >> >> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> >> --- >> arch/arm64/boot/dts/st/stm32mp251.dtsi | 5 ++++- >> 1 file changed, 4 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi >> b/arch/arm64/boot/dts/st/stm32mp251.dtsi >> index 5268a4321841..62101084cab8 100644 >> --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi >> +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi >> @@ -106,17 +106,20 @@ soc@0 { >> ranges = <0x0 0x0 0x0 0x80000000>; >> rifsc: rifsc-bus@42080000 { >> - compatible = "simple-bus"; >> + compatible = "st,stm32mp25-rifsc"; > > You could keep "simple-bus" compatible (in second position). In case of > the RIFSC is not probed, the platform will be able to boot. If you agree > you can use the same for ETZPC. > > Cheers > Alex Sure, good point. I'll change that in V2 Best regards, Gatien > >> reg = <0x42080000 0x1000>; >> #address-cells = <1>; >> #size-cells = <1>; >> ranges; >> + feature-domain-controller; >> + #feature-domain-cells = <1>; >> usart2: serial@400e0000 { >> compatible = "st,stm32h7-uart"; >> reg = <0x400e0000 0x400>; >> interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; >> clocks = <&ck_flexgen_08>; >> + feature-domains = <&rifsc 32>; >> status = "disabled"; >> }; >> }; >
Hi Alex, On 7/6/23 11:30, Gatien CHEVALLIER wrote: > Hi Alex, > > On 7/6/23 11:25, Alexandre TORGUE wrote: >> Hi Gatien >> >> On 7/5/23 19:27, Gatien Chevallier wrote: >>> RIFSC is a firewall controller. Change its compatible so that is matches >>> the documentation and reference RIFSC as a feature-domain-controller. >>> >>> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> >>> --- >>> arch/arm64/boot/dts/st/stm32mp251.dtsi | 5 ++++- >>> 1 file changed, 4 insertions(+), 1 deletion(-) >>> >>> diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi >>> b/arch/arm64/boot/dts/st/stm32mp251.dtsi >>> index 5268a4321841..62101084cab8 100644 >>> --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi >>> +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi >>> @@ -106,17 +106,20 @@ soc@0 { >>> ranges = <0x0 0x0 0x0 0x80000000>; >>> rifsc: rifsc-bus@42080000 { >>> - compatible = "simple-bus"; >>> + compatible = "st,stm32mp25-rifsc"; >> >> You could keep "simple-bus" compatible (in second position). In case >> of the RIFSC is not probed, the platform will be able to boot. If you >> agree you can use the same for ETZPC. >> >> Cheers >> Alex > > Sure, good point. > > I'll change that in V2 > > Best regards, > Gatien Actually, it would be a bad idea to keep "simple-bus" as a compatible. Practical example: 1) Firewall controller forbids a device probe by marking the device's node as populated (OF_POPULATED flag). 2) The simple-bus, which is simple, populates all the devices from the device tree data, overriding what the firewall bus has done. 3)=>Forbidden device's driver will be probed. I think it's best to keep one compatible. If someone wants these drivers as external modules, then it'll be best to handle this differently. I'll resubmit with a single compatible for V2, please do not hesitate to comment on the V2 if you're not okay with this. Best regards, Gatien >> >>> reg = <0x42080000 0x1000>; >>> #address-cells = <1>; >>> #size-cells = <1>; >>> ranges; >>> + feature-domain-controller; >>> + #feature-domain-cells = <1>; >>> usart2: serial@400e0000 { >>> compatible = "st,stm32h7-uart"; >>> reg = <0x400e0000 0x400>; >>> interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; >>> clocks = <&ck_flexgen_08>; >>> + feature-domains = <&rifsc 32>; >>> status = "disabled"; >>> }; >>> }; >>
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 5268a4321841..62101084cab8 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -106,17 +106,20 @@ soc@0 { ranges = <0x0 0x0 0x0 0x80000000>; rifsc: rifsc-bus@42080000 { - compatible = "simple-bus"; + compatible = "st,stm32mp25-rifsc"; reg = <0x42080000 0x1000>; #address-cells = <1>; #size-cells = <1>; ranges; + feature-domain-controller; + #feature-domain-cells = <1>; usart2: serial@400e0000 { compatible = "st,stm32h7-uart"; reg = <0x400e0000 0x400>; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ck_flexgen_08>; + feature-domains = <&rifsc 32>; status = "disabled"; }; };