[v3,6/7] dt-bindings: mmc: convert amlogic,meson-gx.txt to dt-schema
Commit Message
Convert the Amlogic SD / eMMC controller for S905/GXBB family SoCs
to dt-schema.
Take in account the used variant with amlogic,meson-gx-mmc.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
.../bindings/mmc/amlogic,meson-gx-mmc.yaml | 73 ++++++++++++++++++++++
.../devicetree/bindings/mmc/amlogic,meson-gx.txt | 39 ------------
2 files changed, 73 insertions(+), 39 deletions(-)
Comments
On 23/01/2023 11:10, Neil Armstrong wrote:
> Convert the Amlogic SD / eMMC controller for S905/GXBB family SoCs
> to dt-schema.
>
> Take in account the used variant with amlogic,meson-gx-mmc.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
On Mon, 23 Jan 2023 at 11:10, Neil Armstrong <neil.armstrong@linaro.org> wrote:
>
> Convert the Amlogic SD / eMMC controller for S905/GXBB family SoCs
> to dt-schema.
>
> Take in account the used variant with amlogic,meson-gx-mmc.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Applied for next, thanks!
Kind regards
Uffe
> ---
> .../bindings/mmc/amlogic,meson-gx-mmc.yaml | 73 ++++++++++++++++++++++
> .../devicetree/bindings/mmc/amlogic,meson-gx.txt | 39 ------------
> 2 files changed, 73 insertions(+), 39 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml
> new file mode 100644
> index 000000000000..46e235bf228b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mmc/amlogic,meson-gx-mmc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Amlogic SD / eMMC controller for S905/GXBB family SoCs
> +
> +description:
> + The MMC 5.1 compliant host controller on Amlogic provides the
> + interface for SD, eMMC and SDIO devices
> +
> +maintainers:
> + - Neil Armstrong <neil.armstrong@linaro.org>
> +
> +allOf:
> + - $ref: mmc-controller.yaml#
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: amlogic,meson-axg-mmc
> + - items:
> + - const: amlogic,meson-gx-mmc
> + - const: amlogic,meson-gxbb-mmc
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 3
> +
> + clock-names:
> + items:
> + - const: core
> + - const: clkin0
> + - const: clkin1
> +
> + resets:
> + maxItems: 1
> +
> + amlogic,dram-access-quirk:
> + type: boolean
> + description:
> + set when controller's internal DMA engine cannot access the DRAM memory,
> + like on the G12A dedicated SDIO controller.
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - resets
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + mmc@70000 {
> + compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
> + reg = <0x70000 0x2000>;
> + interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&clk_mmc>, <&xtal>, <&clk_div>;
> + clock-names = "core", "clkin0", "clkin1";
> + pinctrl-0 = <&emm_pins>;
> + resets = <&reset_mmc>;
> + };
> diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt
> deleted file mode 100644
> index ccc5358db131..000000000000
> --- a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt
> +++ /dev/null
> @@ -1,39 +0,0 @@
> -Amlogic SD / eMMC controller for S905/GXBB family SoCs
> -
> -The MMC 5.1 compliant host controller on Amlogic provides the
> -interface for SD, eMMC and SDIO devices.
> -
> -This file documents the properties in addition to those available in
> -the MMC core bindings, documented by mmc.txt.
> -
> -Required properties:
> -- compatible : contains one of:
> - - "amlogic,meson-gx-mmc"
> - - "amlogic,meson-gxbb-mmc"
> - - "amlogic,meson-gxl-mmc"
> - - "amlogic,meson-gxm-mmc"
> - - "amlogic,meson-axg-mmc"
> -- clocks : A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
> -- clock-names: Should contain the following:
> - "core" - Main peripheral bus clock
> - "clkin0" - Parent clock of internal mux
> - "clkin1" - Other parent clock of internal mux
> - The driver has an internal mux clock which switches between clkin0 and clkin1 depending on the
> - clock rate requested by the MMC core.
> -- resets : phandle of the internal reset line
> -
> -Optional properties:
> -- amlogic,dram-access-quirk: set when controller's internal DMA engine cannot access the
> - DRAM memory, like on the G12A dedicated SDIO controller.
> -
> -Example:
> -
> - sd_emmc_a: mmc@70000 {
> - compatible = "amlogic,meson-gxbb-mmc";
> - reg = <0x0 0x70000 0x0 0x2000>;
> - interrupts = < GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
> - clocks = <&clkc CLKID_SD_EMMC_A>, <&xtal>, <&clkc CLKID_FCLK_DIV2>;
> - clock-names = "core", "clkin0", "clkin1";
> - pinctrl-0 = <&emmc_pins>;
> - resets = <&reset RESET_SD_EMMC_A>;
> - };
>
> --
> 2.34.1
>
new file mode 100644
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mmc/amlogic,meson-gx-mmc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic SD / eMMC controller for S905/GXBB family SoCs
+
+description:
+ The MMC 5.1 compliant host controller on Amlogic provides the
+ interface for SD, eMMC and SDIO devices
+
+maintainers:
+ - Neil Armstrong <neil.armstrong@linaro.org>
+
+allOf:
+ - $ref: mmc-controller.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: amlogic,meson-axg-mmc
+ - items:
+ - const: amlogic,meson-gx-mmc
+ - const: amlogic,meson-gxbb-mmc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 3
+
+ clock-names:
+ items:
+ - const: core
+ - const: clkin0
+ - const: clkin1
+
+ resets:
+ maxItems: 1
+
+ amlogic,dram-access-quirk:
+ type: boolean
+ description:
+ set when controller's internal DMA engine cannot access the DRAM memory,
+ like on the G12A dedicated SDIO controller.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - resets
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ mmc@70000 {
+ compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
+ reg = <0x70000 0x2000>;
+ interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clk_mmc>, <&xtal>, <&clk_div>;
+ clock-names = "core", "clkin0", "clkin1";
+ pinctrl-0 = <&emm_pins>;
+ resets = <&reset_mmc>;
+ };
deleted file mode 100644
@@ -1,39 +0,0 @@
-Amlogic SD / eMMC controller for S905/GXBB family SoCs
-
-The MMC 5.1 compliant host controller on Amlogic provides the
-interface for SD, eMMC and SDIO devices.
-
-This file documents the properties in addition to those available in
-the MMC core bindings, documented by mmc.txt.
-
-Required properties:
-- compatible : contains one of:
- - "amlogic,meson-gx-mmc"
- - "amlogic,meson-gxbb-mmc"
- - "amlogic,meson-gxl-mmc"
- - "amlogic,meson-gxm-mmc"
- - "amlogic,meson-axg-mmc"
-- clocks : A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
-- clock-names: Should contain the following:
- "core" - Main peripheral bus clock
- "clkin0" - Parent clock of internal mux
- "clkin1" - Other parent clock of internal mux
- The driver has an internal mux clock which switches between clkin0 and clkin1 depending on the
- clock rate requested by the MMC core.
-- resets : phandle of the internal reset line
-
-Optional properties:
-- amlogic,dram-access-quirk: set when controller's internal DMA engine cannot access the
- DRAM memory, like on the G12A dedicated SDIO controller.
-
-Example:
-
- sd_emmc_a: mmc@70000 {
- compatible = "amlogic,meson-gxbb-mmc";
- reg = <0x0 0x70000 0x0 0x2000>;
- interrupts = < GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_SD_EMMC_A>, <&xtal>, <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- pinctrl-0 = <&emmc_pins>;
- resets = <&reset RESET_SD_EMMC_A>;
- };