[v5,6/6] arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: Add vision mezzanine
Commit Message
The Vision Mezzanine for the RB5 ships with an imx517 and ov9282 populated.
Other sensors and components may be added or stacked with additional
mezzanines.
Enable the IMX577 on the vision mezzanine.
An example media-ctl pipeline for the imx577 is:
media-ctl --reset
media-ctl -v -d /dev/media0 -V '"imx577 '22-001a'":0[fmt:SRGGB10/4056x3040 field:none]'
media-ctl -V '"msm_csiphy2":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]'
media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]'
media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../dts/qcom/qrb5165-rb5-vision-mezzanine.dts | 63 +++++++++++++++++++
arch/arm64/boot/dts/qcom/sm8250.dtsi | 33 ++++++++++
3 files changed, 97 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts
Comments
Hi Bryan,
Thank you for the patch.
On Sat, Nov 12, 2022 at 05:26:50PM +0000, Bryan O'Donoghue wrote:
> The Vision Mezzanine for the RB5 ships with an imx517 and ov9282 populated.
Did you mean imx577 ?
> Other sensors and components may be added or stacked with additional
> mezzanines.
>
> Enable the IMX577 on the vision mezzanine.
Is there a particular reason the ov9282 isn't described ?
> An example media-ctl pipeline for the imx577 is:
>
> media-ctl --reset
> media-ctl -v -d /dev/media0 -V '"imx577 '22-001a'":0[fmt:SRGGB10/4056x3040 field:none]'
> media-ctl -V '"msm_csiphy2":0[fmt:SRGGB10/4056x3040]'
> media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]'
> media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]'
> media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]'
> media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
>
> yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0
>
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> .../dts/qcom/qrb5165-rb5-vision-mezzanine.dts | 63 +++++++++++++++++++
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 33 ++++++++++
> 3 files changed, 97 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 70ce09bc63a33..5eadd251a0a16 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5-vision-mezzanine.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
> diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts
> new file mode 100644
> index 0000000000000..315d524045cf3
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts
> @@ -0,0 +1,63 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2022, Linaro Ltd.
> + */
> +
> +/dts-v1/;
Could this be an overlay ?
> +
> +#include "qrb5165-rb5.dts"
> +
> +&camss {
> + status = "okay";
> + vdda-phy-supply = <&vreg_l5a_0p88>;
> + vdda-pll-supply = <&vreg_l9a_1p2>;
> +
> + ports {
> + /* The port index denotes CSIPHY id i.e. csiphy2 */
> + port@2 {
> + reg = <2>;
> + csiphy2_ep: endpoint {
> + clock-lanes = <7>;
> + data-lanes = <0 1 2 3>;
> + remote-endpoint = <&imx577_ep>;
> + };
> + };
> + };
> +};
> +
> +&camcc {
> + status = "okay";
> +};
> +
> +&cci1 {
> + status = "okay";
> +};
> +
> +&cci1_i2c0 {
> + camera@1a {
> + compatible = "sony,imx577";
> + reg = <0x1a>;
> +
> + reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>;
> + pinctrl-names = "default", "suspend";
> + pinctrl-0 = <&cam2_default>;
> + pinctrl-1 = <&cam2_suspend>;
> +
> + clocks = <&camcc CAM_CC_MCLK2_CLK>;
> + assigned-clocks = <&camcc CAM_CC_MCLK2_CLK>;
> + assigned-clock-rates = <24000000>;
> +
> + dovdd-supply = <&vreg_l7f_1p8>;
> + avdd-supply = <&vdc_5v>;
> + dvdd-supply = <&vdc_5v>;
> +
> + port {
> + imx577_ep: endpoint {
> + clock-lanes = <1>;
> + link-frequencies = /bits/ 64 <600000000>;
> + data-lanes = <1 2 3 4>;
> + remote-endpoint = <&csiphy2_ep>;
> + };
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index f28a8893d00d7..83604b9772766 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -3798,6 +3798,39 @@ tlmm: pinctrl@f100000 {
> gpio-ranges = <&tlmm 0 0 181>;
> wakeup-parent = <&pdc>;
>
> + cam2_default: cam2-default-state {
> + rst-pins {
> + pins = "gpio78";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + mclk-pins {
> + pins = "gpio96";
> + function = "cam_mclk";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
This seems board-specific, shouldn't it go to the mezzanine .dts ?
> +
> + cam2_suspend: cam2-suspend-state {
> + rst-pins {
> + pins = "gpio78";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-down;
> + output-low;
> + };
> +
> + mclk-pins {
> + pins = "gpio96";
> + function = "cam_mclk";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> cci0_default: cci0-default-state {
> cci0_i2c0_default: cci0-i2c0-default-pins {
> /* SDA, SCL */
On 12/11/2022 21:45, Laurent Pinchart wrote:
> Hi Bryan,
>
> Thank you for the patch.
>
> On Sat, Nov 12, 2022 at 05:26:50PM +0000, Bryan O'Donoghue wrote:
>> The Vision Mezzanine for the RB5 ships with an imx517 and ov9282 populated.
>
> Did you mean imx577 ?
Yes 1 looks like 7 in my defence
>
>> Other sensors and components may be added or stacked with additional
>> mezzanines.
>>
>> Enable the IMX577 on the vision mezzanine.
>
> Is there a particular reason the ov9282 isn't described ?
ov9282 is WIP.
https://git.linaro.org/people/bryan.odonoghue/kernel.git/log/?h=next-20221013-sm8250-camss-vc
Its too much detail for here but, i2c works, no data is delivered on the
CSI bus - I suspect the upstream init sequence isn't a match for my board.
I'm aiming to unblock just the imx577 for rb5.
>> An example media-ctl pipeline for the imx577 is:
>>
>> media-ctl --reset
>> media-ctl -v -d /dev/media0 -V '"imx577 '22-001a'":0[fmt:SRGGB10/4056x3040 field:none]'
>> media-ctl -V '"msm_csiphy2":0[fmt:SRGGB10/4056x3040]'
>> media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]'
>> media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]'
>> media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]'
>> media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
>>
>> yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0
>>
>> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
>> ---
>> arch/arm64/boot/dts/qcom/Makefile | 1 +
>> .../dts/qcom/qrb5165-rb5-vision-mezzanine.dts | 63 +++++++++++++++++++
>> arch/arm64/boot/dts/qcom/sm8250.dtsi | 33 ++++++++++
>> 3 files changed, 97 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts
>>
>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>> index 70ce09bc63a33..5eadd251a0a16 100644
>> --- a/arch/arm64/boot/dts/qcom/Makefile
>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>> @@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb
>> +dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5-vision-mezzanine.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
>> diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts
>> new file mode 100644
>> index 0000000000000..315d524045cf3
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts
>> @@ -0,0 +1,63 @@
>> +// SPDX-License-Identifier: BSD-3-Clause
>> +/*
>> + * Copyright (c) 2022, Linaro Ltd.
>> + */
>> +
>> +/dts-v1/;
>
> Could this be an overlay ?
Could be. Its a nice idea. I'll look into it separately.
I think it will probably mean chainloading to grub, u-boot or a ramdisk
though..
>>
>> + cam2_default: cam2-default-state {
>> + rst-pins {
>> + pins = "gpio78";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-disable;
>> + };
>> +
>> + mclk-pins {
>> + pins = "gpio96";
>> + function = "cam_mclk";
>> + drive-strength = <16>;
>> + bias-disable;
>> + };
>> + };
>
> This seems board-specific, shouldn't it go to the mezzanine .dts ?
Fair comment, originally that's where I had them
https://git.linaro.org/people/bryan.odonoghue/kernel.git/commit/?h=linux-next-18-05-22%2bimx577-rb5&id=cd394110d80a23292e84deced50f607ff81344e9
These specific pins are dedicated though
https://lore.kernel.org/all/33abcc93-13f1-d6f5-36a3-6ab796f124f9@linaro.org/
---
bod
On 12/11/2022 18:26, Bryan O'Donoghue wrote:
> The Vision Mezzanine for the RB5 ships with an imx517 and ov9282 populated.
> Other sensors and components may be added or stacked with additional
> mezzanines.
>
> Enable the IMX577 on the vision mezzanine.
>
> An example media-ctl pipeline for the imx577 is:
>
> media-ctl --reset
> media-ctl -v -d /dev/media0 -V '"imx577 '22-001a'":0[fmt:SRGGB10/4056x3040 field:none]'
> media-ctl -V '"msm_csiphy2":0[fmt:SRGGB10/4056x3040]'
> media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]'
> media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]'
> media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]'
> media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
>
> yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0
>
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> .../dts/qcom/qrb5165-rb5-vision-mezzanine.dts | 63 +++++++++++++++++++
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 33 ++++++++++
> 3 files changed, 97 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 70ce09bc63a33..5eadd251a0a16 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5-vision-mezzanine.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
> diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts
> new file mode 100644
> index 0000000000000..315d524045cf3
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts
> @@ -0,0 +1,63 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2022, Linaro Ltd.
> + */
> +
> +/dts-v1/;
> +
> +#include "qrb5165-rb5.dts"
> +
> +&camss {
> + status = "okay";
> + vdda-phy-supply = <&vreg_l5a_0p88>;
> + vdda-pll-supply = <&vreg_l9a_1p2>;
> +
> + ports {
> + /* The port index denotes CSIPHY id i.e. csiphy2 */
> + port@2 {
> + reg = <2>;
> + csiphy2_ep: endpoint {
> + clock-lanes = <7>;
> + data-lanes = <0 1 2 3>;
> + remote-endpoint = <&imx577_ep>;
> + };
> + };
> + };
> +};
> +
> +&camcc {
> + status = "okay";
> +};
camcc goes before camss alphabetically. Though I see no reason why a
clock controller would be disabled, even if the clocks sit unused.
Konrad
> +
> +&cci1 {
> + status = "okay";
> +};
> +
> +&cci1_i2c0 {
> + camera@1a {
> + compatible = "sony,imx577";
> + reg = <0x1a>;
> +
> + reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>;
> + pinctrl-names = "default", "suspend";
> + pinctrl-0 = <&cam2_default>;
> + pinctrl-1 = <&cam2_suspend>;
> +
> + clocks = <&camcc CAM_CC_MCLK2_CLK>;
> + assigned-clocks = <&camcc CAM_CC_MCLK2_CLK>;
> + assigned-clock-rates = <24000000>;
> +
> + dovdd-supply = <&vreg_l7f_1p8>;
> + avdd-supply = <&vdc_5v>;
> + dvdd-supply = <&vdc_5v>;
> +
> + port {
> + imx577_ep: endpoint {
> + clock-lanes = <1>;
> + link-frequencies = /bits/ 64 <600000000>;
> + data-lanes = <1 2 3 4>;
> + remote-endpoint = <&csiphy2_ep>;
> + };
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index f28a8893d00d7..83604b9772766 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -3798,6 +3798,39 @@ tlmm: pinctrl@f100000 {
> gpio-ranges = <&tlmm 0 0 181>;
> wakeup-parent = <&pdc>;
>
> + cam2_default: cam2-default-state {
> + rst-pins {
> + pins = "gpio78";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + mclk-pins {
> + pins = "gpio96";
> + function = "cam_mclk";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + cam2_suspend: cam2-suspend-state {
> + rst-pins {
> + pins = "gpio78";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-down;
> + output-low;
> + };
> +
> + mclk-pins {
> + pins = "gpio96";
> + function = "cam_mclk";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> cci0_default: cci0-default-state {
> cci0_i2c0_default: cci0-i2c0-default-pins {
> /* SDA, SCL */
On 14/11/2022 09:49, Konrad Dybcio wrote:
> camcc goes before camss alphabetically. Though I see no reason why a
> clock controller would be disabled, even if the clocks sit unused.
We discussed this before
https://lore.kernel.org/linux-arm-msm/0864eed7-bba2-59ec-dc5f-b491ce114798@linaro.org/
https://lore.kernel.org/linux-devicetree/20220518091943.734478-1-vladimir.zapolskiy@linaro.org/
@Vladimir are you happy enough to enable camcc by default on base rb5 ?
---
bod
@@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb
+dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5-vision-mezzanine.dtb
dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
new file mode 100644
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2022, Linaro Ltd.
+ */
+
+/dts-v1/;
+
+#include "qrb5165-rb5.dts"
+
+&camss {
+ status = "okay";
+ vdda-phy-supply = <&vreg_l5a_0p88>;
+ vdda-pll-supply = <&vreg_l9a_1p2>;
+
+ ports {
+ /* The port index denotes CSIPHY id i.e. csiphy2 */
+ port@2 {
+ reg = <2>;
+ csiphy2_ep: endpoint {
+ clock-lanes = <7>;
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&imx577_ep>;
+ };
+ };
+ };
+};
+
+&camcc {
+ status = "okay";
+};
+
+&cci1 {
+ status = "okay";
+};
+
+&cci1_i2c0 {
+ camera@1a {
+ compatible = "sony,imx577";
+ reg = <0x1a>;
+
+ reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default", "suspend";
+ pinctrl-0 = <&cam2_default>;
+ pinctrl-1 = <&cam2_suspend>;
+
+ clocks = <&camcc CAM_CC_MCLK2_CLK>;
+ assigned-clocks = <&camcc CAM_CC_MCLK2_CLK>;
+ assigned-clock-rates = <24000000>;
+
+ dovdd-supply = <&vreg_l7f_1p8>;
+ avdd-supply = <&vdc_5v>;
+ dvdd-supply = <&vdc_5v>;
+
+ port {
+ imx577_ep: endpoint {
+ clock-lanes = <1>;
+ link-frequencies = /bits/ 64 <600000000>;
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&csiphy2_ep>;
+ };
+ };
+ };
+};
@@ -3798,6 +3798,39 @@ tlmm: pinctrl@f100000 {
gpio-ranges = <&tlmm 0 0 181>;
wakeup-parent = <&pdc>;
+ cam2_default: cam2-default-state {
+ rst-pins {
+ pins = "gpio78";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ mclk-pins {
+ pins = "gpio96";
+ function = "cam_mclk";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ cam2_suspend: cam2-suspend-state {
+ rst-pins {
+ pins = "gpio78";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ output-low;
+ };
+
+ mclk-pins {
+ pins = "gpio96";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
cci0_default: cci0-default-state {
cci0_i2c0_default: cci0-i2c0-default-pins {
/* SDA, SCL */