[10/10] media: ar0521: Tab-align definitions
Commit Message
Align some register and constant definitions using tab in place of
mixed tab+spaces.
Cosmetic change only.
Signed-off-by: Jacopo Mondi <jacopo@jmondi.org>
---
drivers/media/i2c/ar0521.c | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
Comments
On Wed, 5 Oct 2022 at 20:07, Jacopo Mondi <jacopo@jmondi.org> wrote:
>
> Align some register and constant definitions using tab in place of
> mixed tab+spaces.
>
> Cosmetic change only.
>
> Signed-off-by: Jacopo Mondi <jacopo@jmondi.org>
Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
> ---
> drivers/media/i2c/ar0521.c | 30 +++++++++++++++---------------
> 1 file changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/media/i2c/ar0521.c b/drivers/media/i2c/ar0521.c
> index 670fa33acc6f..4373693fa3e9 100644
> --- a/drivers/media/i2c/ar0521.c
> +++ b/drivers/media/i2c/ar0521.c
> @@ -16,17 +16,17 @@
> #include <media/v4l2-subdev.h>
>
> /* External clock (extclk) frequencies */
> -#define AR0521_EXTCLK_MIN (10 * 1000 * 1000)
> -#define AR0521_EXTCLK_MAX (48 * 1000 * 1000)
> +#define AR0521_EXTCLK_MIN (10 * 1000 * 1000)
> +#define AR0521_EXTCLK_MAX (48 * 1000 * 1000)
>
> /* PLL and PLL2 */
> -#define AR0521_PLL_MIN (320 * 1000 * 1000)
> -#define AR0521_PLL_MAX (1280 * 1000 * 1000)
> +#define AR0521_PLL_MIN (320 * 1000 * 1000)
> +#define AR0521_PLL_MAX (1280 * 1000 * 1000)
>
> /* Effective pixel sample rate on the pixel array. */
> -#define AR0521_PIXEL_CLOCK_RATE (207 * 1000 * 1000)
> -#define AR0521_PIXEL_CLOCK_MIN (168 * 1000 * 1000)
> -#define AR0521_PIXEL_CLOCK_MAX (414 * 1000 * 1000)
> +#define AR0521_PIXEL_CLOCK_RATE (207 * 1000 * 1000)
> +#define AR0521_PIXEL_CLOCK_MIN (168 * 1000 * 1000)
> +#define AR0521_PIXEL_CLOCK_MAX (414 * 1000 * 1000)
>
> #define AR0521_NATIVE_WIDTH 2604u
> #define AR0521_NATIVE_HEIGHT 1964u
> @@ -35,15 +35,15 @@
> #define AR0521_MAX_X_ADDR_END 2603u
> #define AR0521_MAX_Y_ADDR_END 1963u
>
> -#define AR0521_WIDTH_MIN 8u
> -#define AR0521_WIDTH_MAX 2592u
> -#define AR0521_HEIGHT_MIN 8u
> -#define AR0521_HEIGHT_MAX 1944u
> +#define AR0521_WIDTH_MIN 8u
> +#define AR0521_WIDTH_MAX 2592u
> +#define AR0521_HEIGHT_MIN 8u
> +#define AR0521_HEIGHT_MAX 1944u
>
> -#define AR0521_WIDTH_BLANKING_MIN 572u
> -#define AR0521_HEIGHT_BLANKING_MIN 38u /* must be even */
> -#define AR0521_TOTAL_HEIGHT_MAX 2464u /* max value of y_addr_end reg */
> -#define AR0521_TOTAL_WIDTH_MAX 3280u /* max value of x_addr_end reg */
> +#define AR0521_WIDTH_BLANKING_MIN 572u
> +#define AR0521_HEIGHT_BLANKING_MIN 38u /* must be even */
> +#define AR0521_TOTAL_HEIGHT_MAX 2464u /* max value of y_addr_end reg */
> +#define AR0521_TOTAL_WIDTH_MAX 3280u /* max value of x_addr_end reg */
>
> #define AR0521_ANA_GAIN_MIN 0x00
> #define AR0521_ANA_GAIN_MAX 0x3f
> --
> 2.37.3
>
Hi Jacopo,
Thank you for the patch.
On Wed, Oct 05, 2022 at 09:06:13PM +0200, Jacopo Mondi wrote:
> Align some register and constant definitions using tab in place of
> mixed tab+spaces.
>
> Cosmetic change only.
>
> Signed-off-by: Jacopo Mondi <jacopo@jmondi.org>
That's an easy one.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> drivers/media/i2c/ar0521.c | 30 +++++++++++++++---------------
> 1 file changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/media/i2c/ar0521.c b/drivers/media/i2c/ar0521.c
> index 670fa33acc6f..4373693fa3e9 100644
> --- a/drivers/media/i2c/ar0521.c
> +++ b/drivers/media/i2c/ar0521.c
> @@ -16,17 +16,17 @@
> #include <media/v4l2-subdev.h>
>
> /* External clock (extclk) frequencies */
> -#define AR0521_EXTCLK_MIN (10 * 1000 * 1000)
> -#define AR0521_EXTCLK_MAX (48 * 1000 * 1000)
> +#define AR0521_EXTCLK_MIN (10 * 1000 * 1000)
> +#define AR0521_EXTCLK_MAX (48 * 1000 * 1000)
>
> /* PLL and PLL2 */
> -#define AR0521_PLL_MIN (320 * 1000 * 1000)
> -#define AR0521_PLL_MAX (1280 * 1000 * 1000)
> +#define AR0521_PLL_MIN (320 * 1000 * 1000)
> +#define AR0521_PLL_MAX (1280 * 1000 * 1000)
>
> /* Effective pixel sample rate on the pixel array. */
> -#define AR0521_PIXEL_CLOCK_RATE (207 * 1000 * 1000)
> -#define AR0521_PIXEL_CLOCK_MIN (168 * 1000 * 1000)
> -#define AR0521_PIXEL_CLOCK_MAX (414 * 1000 * 1000)
> +#define AR0521_PIXEL_CLOCK_RATE (207 * 1000 * 1000)
> +#define AR0521_PIXEL_CLOCK_MIN (168 * 1000 * 1000)
> +#define AR0521_PIXEL_CLOCK_MAX (414 * 1000 * 1000)
>
> #define AR0521_NATIVE_WIDTH 2604u
> #define AR0521_NATIVE_HEIGHT 1964u
> @@ -35,15 +35,15 @@
> #define AR0521_MAX_X_ADDR_END 2603u
> #define AR0521_MAX_Y_ADDR_END 1963u
>
> -#define AR0521_WIDTH_MIN 8u
> -#define AR0521_WIDTH_MAX 2592u
> -#define AR0521_HEIGHT_MIN 8u
> -#define AR0521_HEIGHT_MAX 1944u
> +#define AR0521_WIDTH_MIN 8u
> +#define AR0521_WIDTH_MAX 2592u
> +#define AR0521_HEIGHT_MIN 8u
> +#define AR0521_HEIGHT_MAX 1944u
>
> -#define AR0521_WIDTH_BLANKING_MIN 572u
> -#define AR0521_HEIGHT_BLANKING_MIN 38u /* must be even */
> -#define AR0521_TOTAL_HEIGHT_MAX 2464u /* max value of y_addr_end reg */
> -#define AR0521_TOTAL_WIDTH_MAX 3280u /* max value of x_addr_end reg */
> +#define AR0521_WIDTH_BLANKING_MIN 572u
> +#define AR0521_HEIGHT_BLANKING_MIN 38u /* must be even */
> +#define AR0521_TOTAL_HEIGHT_MAX 2464u /* max value of y_addr_end reg */
> +#define AR0521_TOTAL_WIDTH_MAX 3280u /* max value of x_addr_end reg */
>
> #define AR0521_ANA_GAIN_MIN 0x00
> #define AR0521_ANA_GAIN_MAX 0x3f
Jacopo Mondi <jacopo@jmondi.org> writes:
> Align some register and constant definitions using tab in place of
> mixed tab+spaces.
>
> Cosmetic change only.
> -#define AR0521_PLL_MIN (320 * 1000 * 1000)
> -#define AR0521_PLL_MAX (1280 * 1000 * 1000)
> +#define AR0521_PLL_MIN (320 * 1000 * 1000)
> +#define AR0521_PLL_MAX (1280 * 1000 * 1000)
1_ANA_GAIN_MAX 0x3f
Is it better now?
@@ -16,17 +16,17 @@
#include <media/v4l2-subdev.h>
/* External clock (extclk) frequencies */
-#define AR0521_EXTCLK_MIN (10 * 1000 * 1000)
-#define AR0521_EXTCLK_MAX (48 * 1000 * 1000)
+#define AR0521_EXTCLK_MIN (10 * 1000 * 1000)
+#define AR0521_EXTCLK_MAX (48 * 1000 * 1000)
/* PLL and PLL2 */
-#define AR0521_PLL_MIN (320 * 1000 * 1000)
-#define AR0521_PLL_MAX (1280 * 1000 * 1000)
+#define AR0521_PLL_MIN (320 * 1000 * 1000)
+#define AR0521_PLL_MAX (1280 * 1000 * 1000)
/* Effective pixel sample rate on the pixel array. */
-#define AR0521_PIXEL_CLOCK_RATE (207 * 1000 * 1000)
-#define AR0521_PIXEL_CLOCK_MIN (168 * 1000 * 1000)
-#define AR0521_PIXEL_CLOCK_MAX (414 * 1000 * 1000)
+#define AR0521_PIXEL_CLOCK_RATE (207 * 1000 * 1000)
+#define AR0521_PIXEL_CLOCK_MIN (168 * 1000 * 1000)
+#define AR0521_PIXEL_CLOCK_MAX (414 * 1000 * 1000)
#define AR0521_NATIVE_WIDTH 2604u
#define AR0521_NATIVE_HEIGHT 1964u
@@ -35,15 +35,15 @@
#define AR0521_MAX_X_ADDR_END 2603u
#define AR0521_MAX_Y_ADDR_END 1963u
-#define AR0521_WIDTH_MIN 8u
-#define AR0521_WIDTH_MAX 2592u
-#define AR0521_HEIGHT_MIN 8u
-#define AR0521_HEIGHT_MAX 1944u
+#define AR0521_WIDTH_MIN 8u
+#define AR0521_WIDTH_MAX 2592u
+#define AR0521_HEIGHT_MIN 8u
+#define AR0521_HEIGHT_MAX 1944u
-#define AR0521_WIDTH_BLANKING_MIN 572u
-#define AR0521_HEIGHT_BLANKING_MIN 38u /* must be even */
-#define AR0521_TOTAL_HEIGHT_MAX 2464u /* max value of y_addr_end reg */
-#define AR0521_TOTAL_WIDTH_MAX 3280u /* max value of x_addr_end reg */
+#define AR0521_WIDTH_BLANKING_MIN 572u
+#define AR0521_HEIGHT_BLANKING_MIN 38u /* must be even */
+#define AR0521_TOTAL_HEIGHT_MAX 2464u /* max value of y_addr_end reg */
+#define AR0521_TOTAL_WIDTH_MAX 3280u /* max value of x_addr_end reg */
#define AR0521_ANA_GAIN_MIN 0x00
#define AR0521_ANA_GAIN_MAX 0x3f