[v2,4/4] arm64: dts: qcom: qrb5165-rb5: Enable the IMX577 on cam2
Commit Message
The IMX577 is on CCI1/CSI2 providing four lanes of camera data.
An example media-ctl pipeline is:
media-ctl --reset
media-ctl -v -d /dev/media0 -V '"imx412 '20-001a'":0[fmt:SRGGB10/4056x3040 field:none]'
media-ctl -V '"msm_csiphy2":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]'
media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]'
media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
---
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 60 ++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sm8250.dtsi | 33 +++++++++++++
2 files changed, 93 insertions(+)
Comments
On Tue, 24 May 2022 at 17:02, Bryan O'Donoghue
<bryan.odonoghue@linaro.org> wrote:
>
> The IMX577 is on CCI1/CSI2 providing four lanes of camera data.
By default the RB5 doesn't employ the navigation mezzanine. Thus I
suggest adding a new DTS file that will include the qrb5165-rb5.dts
and extend it with camcc/camss setup.
I remember, this was discussed back and forth. I think it's time we
either create a working repo for mezzanines or push default setups
into the kernel.
I'd vote for the later option.
>
> An example media-ctl pipeline is:
>
> media-ctl --reset
> media-ctl -v -d /dev/media0 -V '"imx412 '20-001a'":0[fmt:SRGGB10/4056x3040 field:none]'
> media-ctl -V '"msm_csiphy2":0[fmt:SRGGB10/4056x3040]'
> media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]'
> media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]'
> media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]'
> media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
>
> yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0
>
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 60 ++++++++++++++++++++++++
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 33 +++++++++++++
> 2 files changed, 93 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
> index 0e63f707b911..756ddeb7530b 100644
> --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
> +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
> @@ -1294,3 +1294,63 @@ &qup_spi0_data_clk {
> drive-strength = <6>;
> bias-disable;
> };
> +
> +&camcc {
> + status = "okay";
> +};
> +
> +&camss {
> + status = "okay";
> + vdda-phy-supply = <&vreg_l5a_0p88>;
> + vdda-pll-supply = <&vreg_l9a_1p2>;
> +
> + ports {
> + /* The port index denotes CSIPHY id i.e. csiphy2 */
> + port@2 {
> + reg = <2>;
> + csiphy2_ep: endpoint {
> + clock-lanes = <7>;
> + data-lanes = <0 1 2 3>;
> + remote-endpoint = <&imx412_ep>;
> + };
> +
> + };
> + };
> +};
> +
> +&cci1 {
> + status = "okay";
> +};
> +
> +&cci1_i2c0 {
> + camera@1a {
> + /*
> + * rb5 ships with an imx577. camx code from qcom treats imx412
> + * and imx577 the same way. Absent better data do the same here.
> + */
> + compatible = "sony,imx412";
> + reg = <0x1a>;
> +
> + reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>;
> + pinctrl-names = "default", "suspend";
> + pinctrl-0 = <&cam2_default>;
> + pinctrl-1 = <&cam2_suspend>;
> +
> + clocks = <&camcc CAM_CC_MCLK2_CLK>;
> + assigned-clocks = <&camcc CAM_CC_MCLK2_CLK>;
> + assigned-clock-rates = <24000000>;
> +
> + dovdd-supply = <&vreg_l7f_1p8>;
> + avdd-supply = <&vdc_5v>;
> + dvdd-supply = <&vdc_5v>;
> +
> + port {
> + imx412_ep: endpoint {
> + clock-lanes = <1>;
> + link-frequencies = /bits/ 64 <600000000>;
> + data-lanes = <1 2 3 4>;
> + remote-endpoint = <&csiphy2_ep>;
> + };
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index aa9a13364865..2b65ec2806d0 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -3788,6 +3788,39 @@ tlmm: pinctrl@f100000 {
> gpio-ranges = <&tlmm 0 0 181>;
> wakeup-parent = <&pdc>;
>
> + cam2_default: cam2-default {
> + rst {
> + pins = "gpio78";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + mclk {
> + pins = "gpio96";
> + function = "cam_mclk";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + cam2_suspend: cam2-suspend {
> + rst {
> + pins = "gpio78";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-down;
> + output-low;
> + };
> +
> + mclk {
> + pins = "gpio96";
> + function = "cam_mclk";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> cci0_default: cci0-default {
> cci0_i2c0_default: cci0-i2c0-default {
> /* SDA, SCL */
> --
> 2.36.1
>
On 24/05/2022 17:21, Dmitry Baryshkov wrote:
> On Tue, 24 May 2022 at 17:02, Bryan O'Donoghue
> <bryan.odonoghue@linaro.org> wrote:
>>
>> The IMX577 is on CCI1/CSI2 providing four lanes of camera data.
>
> By default the RB5 doesn't employ the navigation mezzanine. Thus I
> suggest adding a new DTS file that will include the qrb5165-rb5.dts
> and extend it with camcc/camss setup.
It makes sense to me.
I'll wait to hear from Robert and Bjorn. We can take the opportunity to
do it for RB3 too.
---
bod
@@ -1294,3 +1294,63 @@ &qup_spi0_data_clk {
drive-strength = <6>;
bias-disable;
};
+
+&camcc {
+ status = "okay";
+};
+
+&camss {
+ status = "okay";
+ vdda-phy-supply = <&vreg_l5a_0p88>;
+ vdda-pll-supply = <&vreg_l9a_1p2>;
+
+ ports {
+ /* The port index denotes CSIPHY id i.e. csiphy2 */
+ port@2 {
+ reg = <2>;
+ csiphy2_ep: endpoint {
+ clock-lanes = <7>;
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&imx412_ep>;
+ };
+
+ };
+ };
+};
+
+&cci1 {
+ status = "okay";
+};
+
+&cci1_i2c0 {
+ camera@1a {
+ /*
+ * rb5 ships with an imx577. camx code from qcom treats imx412
+ * and imx577 the same way. Absent better data do the same here.
+ */
+ compatible = "sony,imx412";
+ reg = <0x1a>;
+
+ reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default", "suspend";
+ pinctrl-0 = <&cam2_default>;
+ pinctrl-1 = <&cam2_suspend>;
+
+ clocks = <&camcc CAM_CC_MCLK2_CLK>;
+ assigned-clocks = <&camcc CAM_CC_MCLK2_CLK>;
+ assigned-clock-rates = <24000000>;
+
+ dovdd-supply = <&vreg_l7f_1p8>;
+ avdd-supply = <&vdc_5v>;
+ dvdd-supply = <&vdc_5v>;
+
+ port {
+ imx412_ep: endpoint {
+ clock-lanes = <1>;
+ link-frequencies = /bits/ 64 <600000000>;
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&csiphy2_ep>;
+ };
+ };
+ };
+};
@@ -3788,6 +3788,39 @@ tlmm: pinctrl@f100000 {
gpio-ranges = <&tlmm 0 0 181>;
wakeup-parent = <&pdc>;
+ cam2_default: cam2-default {
+ rst {
+ pins = "gpio78";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ mclk {
+ pins = "gpio96";
+ function = "cam_mclk";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ cam2_suspend: cam2-suspend {
+ rst {
+ pins = "gpio78";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ output-low;
+ };
+
+ mclk {
+ pins = "gpio96";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
cci0_default: cci0-default {
cci0_i2c0_default: cci0-i2c0-default {
/* SDA, SCL */