diff mbox series

[V2,08/10] dt-bindings: media: nxp,imx8mq-vpu: Add support for G1 and G2 on imx8mm

Message ID 20211216111256.2362683-9-aford173@gmail.com (mailing list archive)
State Changes Requested, archived
Delegated to: Hans Verkuil
Headers
Series media: hantro: imx8mq/imx8mm: Let VPU decoders get controlled by vpu-blk-ctrl |

Commit Message

Adam Ford Dec. 16, 2021, 11:12 a.m. UTC 
  The i.MX8M mini appears to have a similar G1 and G2 decoder but the
post-procesing isn't present, so different compatible flags are requred.
Since all the other parameters are the same with imx8mq, just add
the new compatible flags to nxp,imx8mq-vpu.yaml.

Signed-off-by: Adam Ford <aford173@gmail.com>

Comments

Rob Herring Dec. 16, 2021, 9:07 p.m. UTC | #1 
On Thu, Dec 16, 2021 at 05:12:53AM -0600, Adam Ford wrote:
> The i.MX8M mini appears to have a similar G1 and G2 decoder but the
> post-procesing isn't present, so different compatible flags are requred.

post-processing

> Since all the other parameters are the same with imx8mq, just add
> the new compatible flags to nxp,imx8mq-vpu.yaml.
> 
> Signed-off-by: Adam Ford <aford173@gmail.com>
> 
> diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> index c1e157251de7..b1f24c48c73b 100644
> --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> @@ -5,7 +5,7 @@
>  $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"
>  $schema: "http://devicetree.org/meta-schemas/core.yaml#"
>  
> -title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs
> +title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ/i.MX8MM SoCs

Just 'i.MX8' so we don't have to change this everytime?

>  
>  maintainers:
>    - Philipp Zabel <p.zabel@pengutronix.de>
> @@ -20,6 +20,8 @@ properties:
>          deprecated: true
>        - const: nxp,imx8mq-vpu-g1
>        - const: nxp,imx8mq-vpu-g2
> +      - const: nxp,imx8mm-vpu-g1
> +      - const: nxp,imx8mm-vpu-g2

Not compatible with the imx8mq variants?

>  
>    reg:
>      maxItems: 1
> @@ -66,3 +68,27 @@ examples:
>                  clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
>                  power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
>          };
> +  - |
> +        #include <dt-bindings/clock/imx8mm-clock.h>
> +        #include <dt-bindings/power/imx8mm-power.h>
> +        #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +        vpu_g1: video-codec@38300000 {
> +                compatible = "nxp,imx8mm-vpu-g1";
> +                reg = <0x38300000 0x10000>;
> +                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> +                clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>;
> +                power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G1>;
> +        };
> +  - |
> +        #include <dt-bindings/clock/imx8mm-clock.h>
> +        #include <dt-bindings/power/imx8mm-power.h>
> +        #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +        vpu_g2: video-codec@38300000 {
> +                compatible = "nxp,imx8mm-vpu-g2";
> +                reg = <0x38310000 0x10000>;
> +                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> +                clocks = <&clk IMX8MM_CLK_VPU_G2_ROOT>;
> +                power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>;
> +        };

No point in more examples just for a different compatible.

> -- 
> 2.32.0
> 
>
Adam Ford Dec. 16, 2021, 9:21 p.m. UTC | #2 
On Thu, Dec 16, 2021 at 3:07 PM Rob Herring <robh@kernel.org> wrote:
>
> On Thu, Dec 16, 2021 at 05:12:53AM -0600, Adam Ford wrote:
> > The i.MX8M mini appears to have a similar G1 and G2 decoder but the
> > post-procesing isn't present, so different compatible flags are requred.
>
> post-processing
>
> > Since all the other parameters are the same with imx8mq, just add
> > the new compatible flags to nxp,imx8mq-vpu.yaml.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> >
> > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > index c1e157251de7..b1f24c48c73b 100644
> > --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > @@ -5,7 +5,7 @@
> >  $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"
> >  $schema: "http://devicetree.org/meta-schemas/core.yaml#"
> >
> > -title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs
> > +title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ/i.MX8MM SoCs
>
> Just 'i.MX8' so we don't have to change this everytime?

Are you OK with i.MX8M?  8MQ, 8MM, and 8MP all appear to have G1 and
G2 decoders.  The i.MX8 is different.
>
> >
> >  maintainers:
> >    - Philipp Zabel <p.zabel@pengutronix.de>
> > @@ -20,6 +20,8 @@ properties:
> >          deprecated: true
> >        - const: nxp,imx8mq-vpu-g1
> >        - const: nxp,imx8mq-vpu-g2
> > +      - const: nxp,imx8mm-vpu-g1
> > +      - const: nxp,imx8mm-vpu-g2
>
> Not compatible with the imx8mq variants?

No, the structures associated with these compatible flags telling the
driver what features are available have options for the post-processor
in the 8MQ which are not present in the 8MM.

>
> >
> >    reg:
> >      maxItems: 1
> > @@ -66,3 +68,27 @@ examples:
> >                  clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
> >                  power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
> >          };
> > +  - |
> > +        #include <dt-bindings/clock/imx8mm-clock.h>
> > +        #include <dt-bindings/power/imx8mm-power.h>
> > +        #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +        vpu_g1: video-codec@38300000 {
> > +                compatible = "nxp,imx8mm-vpu-g1";
> > +                reg = <0x38300000 0x10000>;
> > +                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > +                clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>;
> > +                power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G1>;
> > +        };
> > +  - |
> > +        #include <dt-bindings/clock/imx8mm-clock.h>
> > +        #include <dt-bindings/power/imx8mm-power.h>
> > +        #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +        vpu_g2: video-codec@38300000 {
> > +                compatible = "nxp,imx8mm-vpu-g2";
> > +                reg = <0x38310000 0x10000>;
> > +                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > +                clocks = <&clk IMX8MM_CLK_VPU_G2_ROOT>;
> > +                power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>;
> > +        };
>
> No point in more examples just for a different compatible.

No problem.
>
> > --
> > 2.32.0
> >
> >
Ezequiel Garcia Dec. 16, 2021, 11:03 p.m. UTC | #3 
Hi Adam,

On Thu, 16 Dec 2021 at 18:21, Adam Ford <aford173@gmail.com> wrote:
>
> On Thu, Dec 16, 2021 at 3:07 PM Rob Herring <robh@kernel.org> wrote:
> >
> > On Thu, Dec 16, 2021 at 05:12:53AM -0600, Adam Ford wrote:
> > > The i.MX8M mini appears to have a similar G1 and G2 decoder but the
> > > post-procesing isn't present, so different compatible flags are requred.
> >
> > post-processing
> >
> > > Since all the other parameters are the same with imx8mq, just add
> > > the new compatible flags to nxp,imx8mq-vpu.yaml.
> > >
> > > Signed-off-by: Adam Ford <aford173@gmail.com>
> > >
> > > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > > index c1e157251de7..b1f24c48c73b 100644
> > > --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > > +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > > @@ -5,7 +5,7 @@
> > >  $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"
> > >  $schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > >
> > > -title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs
> > > +title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ/i.MX8MM SoCs
> >
> > Just 'i.MX8' so we don't have to change this everytime?
>
> Are you OK with i.MX8M?  8MQ, 8MM, and 8MP all appear to have G1 and
> G2 decoders.  The i.MX8 is different.
> >
> > >
> > >  maintainers:
> > >    - Philipp Zabel <p.zabel@pengutronix.de>
> > > @@ -20,6 +20,8 @@ properties:
> > >          deprecated: true
> > >        - const: nxp,imx8mq-vpu-g1
> > >        - const: nxp,imx8mq-vpu-g2
> > > +      - const: nxp,imx8mm-vpu-g1
> > > +      - const: nxp,imx8mm-vpu-g2
> >
> > Not compatible with the imx8mq variants?
>
> No, the structures associated with these compatible flags telling the
> driver what features are available have options for the post-processor
> in the 8MQ which are not present in the 8MM.
>

Just as G1 and G2 are different blocks, their "post-processor"
features are really different too.

The G2 core typically produces a tiled format, NV12_4L4,
and it an inline post-processor to convert that to linear NV12.

How does this work on the 8MM? What pixel format does it
produce natively?

It's hard to imagine the G2 block doesn't do linear NV12,
so I'm inclined to think it has that post-processing feature.

Thanks,
Ezequiel
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
index c1e157251de7..b1f24c48c73b 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
@@ -5,7 +5,7 @@ 
 $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"
 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
 
-title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs
+title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ/i.MX8MM SoCs
 
 maintainers:
   - Philipp Zabel <p.zabel@pengutronix.de>
@@ -20,6 +20,8 @@  properties:
         deprecated: true
       - const: nxp,imx8mq-vpu-g1
       - const: nxp,imx8mq-vpu-g2
+      - const: nxp,imx8mm-vpu-g1
+      - const: nxp,imx8mm-vpu-g2
 
   reg:
     maxItems: 1
@@ -66,3 +68,27 @@  examples:
                 clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
                 power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
         };
+  - |
+        #include <dt-bindings/clock/imx8mm-clock.h>
+        #include <dt-bindings/power/imx8mm-power.h>
+        #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+        vpu_g1: video-codec@38300000 {
+                compatible = "nxp,imx8mm-vpu-g1";
+                reg = <0x38300000 0x10000>;
+                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>;
+                power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G1>;
+        };
+  - |
+        #include <dt-bindings/clock/imx8mm-clock.h>
+        #include <dt-bindings/power/imx8mm-power.h>
+        #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+        vpu_g2: video-codec@38300000 {
+                compatible = "nxp,imx8mm-vpu-g2";
+                reg = <0x38310000 0x10000>;
+                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&clk IMX8MM_CLK_VPU_G2_ROOT>;
+                power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>;
+        };