Message ID | 516b33118d489e56499ff8c64c019709b744110c.1597931876.git.robin.murphy@arm.com (mailing list archive) |
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State | Not Applicable, archived |
Headers |
Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from <linux-media-owner@vger.kernel.org>) id 1k8m75-00AK5p-6o; Thu, 20 Aug 2020 15:04:24 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728812AbgHTPJz (ORCPT <rfc822;mkrufky@linuxtv.org> + 1 other); Thu, 20 Aug 2020 11:09:55 -0400 Received: from foss.arm.com ([217.140.110.172]:41146 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728757AbgHTPJk (ORCPT <rfc822;linux-media@vger.kernel.org>); Thu, 20 Aug 2020 11:09:40 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 81AC414BF; Thu, 20 Aug 2020 08:09:39 -0700 (PDT) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.37]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DFEF43F6CF; Thu, 20 Aug 2020 08:09:35 -0700 (PDT) From: Robin Murphy <robin.murphy@arm.com> To: hch@lst.de, joro@8bytes.org, linux@armlinux.org.uk Cc: will@kernel.org, inki.dae@samsung.com, sw0312.kim@samsung.com, kyungmin.park@samsung.com, m.szyprowski@samsung.com, agross@kernel.org, bjorn.andersson@linaro.org, thierry.reding@gmail.com, jonathanh@nvidia.com, vdumpa@nvidia.com, digetx@gmail.com, matthias.bgg@gmail.com, yong.wu@mediatek.com, geert+renesas@glider.be, magnus.damm@gmail.com, t-kristo@ti.com, s-anna@ti.com, laurent.pinchart@ideasonboard.com, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, linux-samsung-soc@vger.kernel.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 12/18] iommu/tegra-gart: Add IOMMU_DOMAIN_DMA support Date: Thu, 20 Aug 2020 16:08:31 +0100 Message-Id: <516b33118d489e56499ff8c64c019709b744110c.1597931876.git.robin.murphy@arm.com> X-Mailer: git-send-email 2.28.0.dirty In-Reply-To: <cover.1597931875.git.robin.murphy@arm.com> References: <cover.1597931875.git.robin.murphy@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: <linux-media.vger.kernel.org> X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.4 (--) X-LSpam-Report: No, score=-2.4 required=5.0 tests=BAYES_00=-1.9,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1 autolearn=ham autolearn_force=no |
Series |
Convert arch/arm to use iommu-dma
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Commit Message
Robin Murphy
Aug. 20, 2020, 3:08 p.m. UTC
Now that arch/arm is wired up for default domains and iommu-dma,
implement the corresponding driver-side support for DMA domains.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
drivers/iommu/tegra-gart.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
Comments
20.08.2020 18:08, Robin Murphy пишет: > Now that arch/arm is wired up for default domains and iommu-dma, > implement the corresponding driver-side support for DMA domains. > > Signed-off-by: Robin Murphy <robin.murphy@arm.com> > --- > drivers/iommu/tegra-gart.c | 17 ++++++++++++----- > 1 file changed, 12 insertions(+), 5 deletions(-) > > diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c > index fac720273889..e081387080f6 100644 > --- a/drivers/iommu/tegra-gart.c > +++ b/drivers/iommu/tegra-gart.c > @@ -9,6 +9,7 @@ > > #define dev_fmt(fmt) "gart: " fmt > > +#include <linux/dma-iommu.h> > #include <linux/io.h> > #include <linux/iommu.h> > #include <linux/moduleparam.h> > @@ -145,16 +146,22 @@ static struct iommu_domain *gart_iommu_domain_alloc(unsigned type) > { > struct iommu_domain *domain; Hello, Robin! Tegra20 GART isn't a real IOMMU, but a small relocation aperture. We would only want to use it for a temporal mappings (managed by GPU driver) for the time while GPU hardware is busy and working with a sparse DMA buffers, the driver will take care of unmapping the sparse buffers once GPU work is finished [1]. In a case of contiguous DMA buffers, we want to bypass the IOMMU and use buffer's phys address because GART aperture is small and all buffers simply can't fit into GART for a complex GPU operations that involve multiple buffers [2][3]. The upstream GPU driver still doesn't support GART, but eventually it needs to be changed. [1] https://github.com/grate-driver/linux/blob/master/drivers/gpu/drm/tegra/gart.c#L489 [2] https://github.com/grate-driver/linux/blob/master/drivers/gpu/drm/tegra/gart.c#L542 [3] https://github.com/grate-driver/linux/blob/master/drivers/gpu/drm/tegra/uapi/patching.c#L90 > - if (type != IOMMU_DOMAIN_UNMANAGED) > + if (type != IOMMU_DOMAIN_UNMANAGED && type != IOMMU_DOMAIN_DMA) > return NULL; Will a returned NULL tell to IOMMU core that implicit domain shouldn't be used? Is it possible to leave this driver as-is?
On 2020-08-20 21:16, Dmitry Osipenko wrote: > 20.08.2020 18:08, Robin Murphy пишет: >> Now that arch/arm is wired up for default domains and iommu-dma, >> implement the corresponding driver-side support for DMA domains. >> >> Signed-off-by: Robin Murphy <robin.murphy@arm.com> >> --- >> drivers/iommu/tegra-gart.c | 17 ++++++++++++----- >> 1 file changed, 12 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c >> index fac720273889..e081387080f6 100644 >> --- a/drivers/iommu/tegra-gart.c >> +++ b/drivers/iommu/tegra-gart.c >> @@ -9,6 +9,7 @@ >> >> #define dev_fmt(fmt) "gart: " fmt >> >> +#include <linux/dma-iommu.h> >> #include <linux/io.h> >> #include <linux/iommu.h> >> #include <linux/moduleparam.h> >> @@ -145,16 +146,22 @@ static struct iommu_domain *gart_iommu_domain_alloc(unsigned type) >> { >> struct iommu_domain *domain; > > Hello, Robin! > > Tegra20 GART isn't a real IOMMU, but a small relocation aperture. We > would only want to use it for a temporal mappings (managed by GPU > driver) for the time while GPU hardware is busy and working with a > sparse DMA buffers, the driver will take care of unmapping the sparse > buffers once GPU work is finished [1]. In a case of contiguous DMA > buffers, we want to bypass the IOMMU and use buffer's phys address > because GART aperture is small and all buffers simply can't fit into > GART for a complex GPU operations that involve multiple buffers [2][3]. > The upstream GPU driver still doesn't support GART, but eventually it > needs to be changed. > > [1] > https://github.com/grate-driver/linux/blob/master/drivers/gpu/drm/tegra/gart.c#L489 > > [2] > https://github.com/grate-driver/linux/blob/master/drivers/gpu/drm/tegra/gart.c#L542 > > [3] > https://github.com/grate-driver/linux/blob/master/drivers/gpu/drm/tegra/uapi/patching.c#L90 > >> - if (type != IOMMU_DOMAIN_UNMANAGED) >> + if (type != IOMMU_DOMAIN_UNMANAGED && type != IOMMU_DOMAIN_DMA) >> return NULL; > > Will a returned NULL tell to IOMMU core that implicit domain shouldn't > be used? Is it possible to leave this driver as-is? The aim of this patch was just to make the conversion without functional changes wherever possible, i.e. maintain an equivalent to the existing ARM behaviour of allocating its own implicit domains for everything. It doesn't represent any judgement of whether that was ever appropriate for this driver in the first place ;) Hopefully my other reply already covered the degree of control drivers can have with proper default domains, but do shout if anything wasn't clear. Cheers, Robin.
21.08.2020 03:28, Robin Murphy пишет: ... >> Will a returned NULL tell to IOMMU core that implicit domain shouldn't >> be used? Is it possible to leave this driver as-is? > > The aim of this patch was just to make the conversion without functional > changes wherever possible, i.e. maintain an equivalent to the existing > ARM behaviour of allocating its own implicit domains for everything. It > doesn't represent any judgement of whether that was ever appropriate for > this driver in the first place ;) > > Hopefully my other reply already covered the degree of control drivers > can have with proper default domains, but do shout if anything wasn't > clear. Thank you for the detailed comments! I wasn't watching closely all the recent iommu/ changes and yours clarification is very helpful! My current understanding is that the GART driver will need to support the IOMMU_DOMAIN_IDENTITY and set def_domain_type to IOMMU_DOMAIN_IDENTITY for all devices. Meanwhile, today's upstream drivers don't use GART, hence this patch should be okay. Although, it's a bit unlikely that the IOMMU_DOMAIN_DMA type will ever be useful for the GART, and thus, I'm still thinking that will be a bit nicer to keep GART driver as-is for now.
diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c index fac720273889..e081387080f6 100644 --- a/drivers/iommu/tegra-gart.c +++ b/drivers/iommu/tegra-gart.c @@ -9,6 +9,7 @@ #define dev_fmt(fmt) "gart: " fmt +#include <linux/dma-iommu.h> #include <linux/io.h> #include <linux/iommu.h> #include <linux/moduleparam.h> @@ -145,16 +146,22 @@ static struct iommu_domain *gart_iommu_domain_alloc(unsigned type) { struct iommu_domain *domain; - if (type != IOMMU_DOMAIN_UNMANAGED) + if (type != IOMMU_DOMAIN_UNMANAGED && type != IOMMU_DOMAIN_DMA) return NULL; domain = kzalloc(sizeof(*domain), GFP_KERNEL); - if (domain) { - domain->geometry.aperture_start = gart_handle->iovmm_base; - domain->geometry.aperture_end = gart_handle->iovmm_end - 1; - domain->geometry.force_aperture = true; + if (!domain) + return NULL; + + if (type == IOMMU_DOMAIN_DMA && iommu_get_dma_cookie(domain)) { + kfree(domain); + return NULL; } + domain->geometry.aperture_start = gart_handle->iovmm_base; + domain->geometry.aperture_end = gart_handle->iovmm_end - 1; + domain->geometry.force_aperture = true; + return domain; }