From patchwork Fri Jul 2 09:59:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 75528 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1lzFxJ-007rH6-7n; Fri, 02 Jul 2021 09:59:29 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231557AbhGBKB6 (ORCPT + 1 other); Fri, 2 Jul 2021 06:01:58 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:55518 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231466AbhGBKB4 (ORCPT ); Fri, 2 Jul 2021 06:01:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a4; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1625219963; x=1627811963; h=From:Sender:Reply-To:Subject:Date:Message-Id:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=Qr5s1r6Ub8Vj1bNnO6u1Muq3sTquNmzAkAvrU3k4hJM=; b=Jl1XrQxUKM1r42lBlih67vIRFud53pGzcHLj/yGoYx4HuQaQWOLY1U9Qj6EhT2M7 tGvdSzkkPCt9onl87t/4LmhJq9zNborc+mAsZHBSTf5fHXh/gxqqOEsH856QNEoL s28HbJAmM88l6kRc2xSO/q6dSaq43d2I4WtnYT0feOs=; X-AuditID: c39127d2-a9fbd70000001c5e-74-60dee37b6717 Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id A3.01.07262.B73EED06; Fri, 2 Jul 2021 11:59:23 +0200 (CEST) Received: from lws-riedmueller.phytec.de ([172.16.23.108]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021070211592287-1081046 ; Fri, 2 Jul 2021 11:59:22 +0200 From: Stefan Riedmueller To: Laurent Pinchart , Rob Herring Cc: Mauro Carvalho Chehab , Sakari Ailus , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Enrico Scholz , Stefan Riedmueller Subject: [PATCH v3 1/6] media: mt9p031: Read back the real clock rate Date: Fri, 2 Jul 2021 11:59:17 +0200 Message-Id: <20210702095922.118614-2-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210702095922.118614-1-s.riedmueller@phytec.de> References: <20210702095922.118614-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 02.07.2021 11:59:23, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 02.07.2021 11:59:23 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrCLMWRmVeSWpSXmKPExsWyRoCBS7f68b0Eg98LBSzmHznHarH32AUW i86JS9gtLu+aw2bRs2Erq8WyTX+YLFr3HmG3+LTlG5MDh8fsjpmsHptWdbJ5zDsZ6LFi5X8m j8+b5AJYo7hsUlJzMstSi/TtErgyZi/4zlxwiL9i58WPjA2MHbxdjJwcEgImEv/uXmLvYuTi EBLYxihx7/hjKOcao8TiT+1MIFVsAkYSC6Y1gtkiAlESP8/3sIDYzAITmSQa92uA2MICrhKv D55hBLFZBFQkNn3+AlbDK2Arce33I3aIbfISMy99B7M5Bewkztw8ClYjBFRztP8XK0S9oMTJ mU9YQI6QELjCKDHj0jImiGYhidOLzzJDLNaWWLbwNfMERoFZSHpmIUktYGRaxSiUm5mcnVqU ma1XkFFZkpqsl5K6iREY0ocnql/awdg3x+MQIxMH4yFGCQ5mJRHe0Hn3EoR4UxIrq1KL8uOL SnNSiw8xSnOwKInzbuAtCRMSSE8sSc1OTS1ILYLJMnFwSjUw1vq5awtdqG+bd3R6/Kf7C2da nZ5aVih3Weahj9mel5wLPkeKc3s+7amq5e/nlox567+2NOWcjFydyNn+l/MYUkS2Ve1fvj0j Si37fJ3fdQnBR80WR4K9rkte+svLdDeA4dX5l3N4fuU7sTDdW+Ke9P3hRrlCe23euk1m3H1b FF0rls8te7dQiaU4I9FQi7moOBEAw5y0f1cCAAA= Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.3 (--) X-LSpam-Report: No, score=-2.3 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_NONE=-0.0001,T_DKIM_INVALID=0.01 autolearn=ham autolearn_force=no From: Enrico Scholz The real and requested clock can differ and because it is used to calculate PLL values, the real clock rate should be read. Signed-off-by: Enrico Scholz Signed-off-by: Stefan Riedmueller Reviewed-by: Laurent Pinchart --- drivers/media/i2c/mt9p031.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c index 77567341ec98..3eaaa8d44523 100644 --- a/drivers/media/i2c/mt9p031.c +++ b/drivers/media/i2c/mt9p031.c @@ -255,6 +255,7 @@ static int mt9p031_clk_setup(struct mt9p031 *mt9p031) struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev); struct mt9p031_platform_data *pdata = mt9p031->pdata; + unsigned long ext_freq; int ret; mt9p031->clk = devm_clk_get(&client->dev, NULL); @@ -265,13 +266,15 @@ static int mt9p031_clk_setup(struct mt9p031 *mt9p031) if (ret < 0) return ret; + ext_freq = clk_get_rate(mt9p031->clk); + /* If the external clock frequency is out of bounds for the PLL use the * pixel clock divider only and disable the PLL. */ - if (pdata->ext_freq > limits.ext_clock_max) { + if (ext_freq > limits.ext_clock_max) { unsigned int div; - div = DIV_ROUND_UP(pdata->ext_freq, pdata->target_freq); + div = DIV_ROUND_UP(ext_freq, pdata->target_freq); div = roundup_pow_of_two(div) / 2; mt9p031->clk_div = min_t(unsigned int, div, 64); @@ -280,7 +283,7 @@ static int mt9p031_clk_setup(struct mt9p031 *mt9p031) return 0; } - mt9p031->pll.ext_clock = pdata->ext_freq; + mt9p031->pll.ext_clock = ext_freq; mt9p031->pll.pix_clock = pdata->target_freq; mt9p031->use_pll = true; From patchwork Fri Jul 2 09:59:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 75529 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1lzFxK-007rH6-Bs; Fri, 02 Jul 2021 09:59:30 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231708AbhGBKB7 (ORCPT + 1 other); Fri, 2 Jul 2021 06:01:59 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:55538 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231563AbhGBKB5 (ORCPT ); Fri, 2 Jul 2021 06:01:57 -0400 DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a4; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1625219963; x=1627811963; h=From:Sender:Reply-To:Subject:Date:Message-Id:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=i21HcJrDIPePWdeQLseYqFtUzqXx/iuUIf/ULTnFwYs=; b=si0v7WOeT9qi8hhpBwz0KCjcfphlAEFjXftqE5V59Ouoh4Mp0qblg9X+u0i7e3rd Vg40tPQ+BTD2ccTsy9ntK46Lw3ucQkIwxKFaFct5GGNl5Gh4nW6Ikb7czXXx5piE 3QEmsR7AV9bdPeTk9Il2riX9ripe3lIKZh3ZzZVK6Nk=; X-AuditID: c39127d2-a9fbd70000001c5e-76-60dee37bbdba Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 54.01.07262.B73EED06; Fri, 2 Jul 2021 11:59:23 +0200 (CEST) Received: from lws-riedmueller.phytec.de ([172.16.23.108]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021070211592312-1081047 ; Fri, 2 Jul 2021 11:59:23 +0200 From: Stefan Riedmueller To: Laurent Pinchart , Rob Herring Cc: Mauro Carvalho Chehab , Sakari Ailus , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Christian Hemp , Stefan Riedmueller Subject: [PATCH v3 2/6] media: mt9p031: Make pixel clock polarity configurable by DT Date: Fri, 2 Jul 2021 11:59:18 +0200 Message-Id: <20210702095922.118614-3-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210702095922.118614-1-s.riedmueller@phytec.de> References: <20210702095922.118614-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 02.07.2021 11:59:23, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 02.07.2021 11:59:23 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrFLMWRmVeSWpSXmKPExsWyRoCBS7f68b0EgwX/1SzmHznHatE5cQm7 xeVdc9gsejZsZbVYtukPk0Xr3iPsFp+2fGNyYPeY3TGT1WPTqk42j3knAz0+b5ILYInisklJ zcksSy3St0vgyljb2cBesEmqYsLiaywNjOvEuhg5OSQETCTmbHnA2MXIxSEksI1R4tbpu1DO NUaJ7/+2M4FUsQkYSSyY1ghmiwhESfw838MCUsQs0MwksWn5NDaQhLBAiMTVvm1gNouAisTl J/eAGjg4eAVsJdr3ckJsk5eYeek7O4jNKWAncebmURYQWwio5Gj/L1YQm1dAUOLkzCdg8yUE rjBKzLi0jAmiWUji9OKzzCA2s4C2xLKFr5knMArMQtIzC0lqASPTKkah3Mzk7NSizGy9gozK ktRkvZTUTYzA8D08Uf3SDsa+OR6HGJk4GA8xSnAwK4nwhs67lyDEm5JYWZValB9fVJqTWnyI UZqDRUmcdwNvSZiQQHpiSWp2ampBahFMlomDU6qBMWRDV27Y/HcJl4yv9HzPDNh+d01gRxFj fIrxl6d3thd1lZjzLFdZu5XR/L9BSIqvW9tRnZ0nordWdtvufie5fN7GxltpqypVAl3muWhJ 2Jc26qXntb3JlZgw2+WX92GFxicbBNqPZG6of5ma4qjUM2v2uVXZbhMfPtrC0Rf2zNsoeFPJ Bol7SizFGYmGWsxFxYkASClN8U0CAAA= Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.3 (--) X-LSpam-Report: No, score=-2.3 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_NONE=-0.0001,T_DKIM_INVALID=0.01 autolearn=ham autolearn_force=no From: Christian Hemp Evaluate the desired pixel clock polarity from the device tree. Signed-off-by: Christian Hemp Signed-off-by: Stefan Riedmueller --- drivers/media/i2c/Kconfig | 1 + drivers/media/i2c/mt9p031.c | 20 +++++++++++++++++++- include/media/i2c/mt9p031.h | 1 + 3 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 588f8eb95984..1f9e98be8066 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -1187,6 +1187,7 @@ config VIDEO_MT9P031 select MEDIA_CONTROLLER select VIDEO_V4L2_SUBDEV_API select VIDEO_APTINA_PLL + select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the Aptina (Micron) mt9p031 5 Mpixel camera. diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c index 3eaaa8d44523..6a6f16df3f4a 100644 --- a/drivers/media/i2c/mt9p031.c +++ b/drivers/media/i2c/mt9p031.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include "aptina-pll.h" @@ -398,6 +399,14 @@ static int __mt9p031_set_power(struct mt9p031 *mt9p031, bool on) return ret; } + /* Configure the pixel clock polarity */ + if (mt9p031->pdata && mt9p031->pdata->pixclk_pol) { + ret = mt9p031_write(client, MT9P031_PIXEL_CLOCK_CONTROL, + MT9P031_PIXEL_CLOCK_INVERT); + if (ret < 0) + return ret; + } + return v4l2_ctrl_handler_setup(&mt9p031->ctrls); } @@ -1040,8 +1049,11 @@ static const struct v4l2_subdev_internal_ops mt9p031_subdev_internal_ops = { static struct mt9p031_platform_data * mt9p031_get_pdata(struct i2c_client *client) { - struct mt9p031_platform_data *pdata; + struct mt9p031_platform_data *pdata = NULL; struct device_node *np; + struct v4l2_fwnode_endpoint endpoint = { + .bus_type = V4L2_MBUS_PARALLEL + }; if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node) return client->dev.platform_data; @@ -1050,6 +1062,9 @@ mt9p031_get_pdata(struct i2c_client *client) if (!np) return NULL; + if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &endpoint) < 0) + goto done; + pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL); if (!pdata) goto done; @@ -1057,6 +1072,9 @@ mt9p031_get_pdata(struct i2c_client *client) of_property_read_u32(np, "input-clock-frequency", &pdata->ext_freq); of_property_read_u32(np, "pixel-clock-frequency", &pdata->target_freq); + pdata->pixclk_pol = !!(endpoint.bus.parallel.flags & + V4L2_MBUS_PCLK_SAMPLE_RISING); + done: of_node_put(np); return pdata; diff --git a/include/media/i2c/mt9p031.h b/include/media/i2c/mt9p031.h index 7c29c53aa988..f933cd0be8e5 100644 --- a/include/media/i2c/mt9p031.h +++ b/include/media/i2c/mt9p031.h @@ -10,6 +10,7 @@ struct v4l2_subdev; * @target_freq: Pixel clock frequency */ struct mt9p031_platform_data { + unsigned int pixclk_pol:1; int ext_freq; int target_freq; }; From patchwork Fri Jul 2 09:59:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 75530 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1lzFxL-007rH6-CA; Fri, 02 Jul 2021 09:59:31 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231766AbhGBKCA (ORCPT + 1 other); Fri, 2 Jul 2021 06:02:00 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:55534 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231572AbhGBKB5 (ORCPT ); Fri, 2 Jul 2021 06:01:57 -0400 DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a4; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1625219963; x=1627811963; h=From:Sender:Reply-To:Subject:Date:Message-Id:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=Zic2qKtoJ6PDuAYqaDtiLhCpLAC6FxtCGOmCk/unsSU=; b=muxZOiqqGZghe0t565cdNrT00KQd+BVndfZ6qhBMyTMwi6Z5+k9rM9nwjBG/B9AQ XuF5bXJF3q5KkLKQlhszpQU+A5jWRUs5JpSX5olrvM2ngmdtr4H9r7wZN2LGOFT6 sy3E1hEc8DDoOkA/hdWTQw1Qz5nj5sYRdG+GCLiBOwQ=; X-AuditID: c39127d2-a77bc70000001c5e-79-60dee37b4d19 Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 15.01.07262.B73EED06; Fri, 2 Jul 2021 11:59:23 +0200 (CEST) Received: from lws-riedmueller.phytec.de ([172.16.23.108]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021070211592337-1081048 ; Fri, 2 Jul 2021 11:59:23 +0200 From: Stefan Riedmueller To: Laurent Pinchart , Rob Herring Cc: Mauro Carvalho Chehab , Sakari Ailus , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Stefan Riedmueller Subject: [PATCH v3 3/6] dt-bindings: media: mt9p031: Add missing required properties Date: Fri, 2 Jul 2021 11:59:19 +0200 Message-Id: <20210702095922.118614-4-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210702095922.118614-1-s.riedmueller@phytec.de> References: <20210702095922.118614-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 02.07.2021 11:59:23, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 02.07.2021 11:59:23 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrJLMWRmVeSWpSXmKPExsWyRoCBS7f68b0EgxtnDS3mHznHatE5cQm7 xeVdc9gsejZsZbVYtukPk0Xr3iPsFp+2fGNyYPeY3TGT1WPTqk42j3knAz0+b5ILYInisklJ zcksSy3St0vgyti4/zJrwXWuip7dF9gaGN9zdDFyckgImEjcPfWArYuRi0NIYBujRHfHTmaQ hJDANUaJLzONQWw2ASOJBdMamUBsEYEoiZ/ne1hAbGaBB4wS+18lgNjCAiESJ/73soPYLAIq Evcud7GC2LwCthITZ65mh1gmLzHz0ncwm1PATuLMzaMsELtsJY72/4KqF5Q4OfMJC8hBEgJX GCVmXFrGBNEsJHF68VlmiMXaEssWvmaewCgwC0nPLCSpBYxMqxiFcjOTs1OLMrP1CjIqS1KT 9VJSNzECg/fwRPVLOxj75ngcYmTiYDzEKMHBrCTCGzrvXoIQb0piZVVqUX58UWlOavEhRmkO FiVx3g28JWFCAumJJanZqakFqUUwWSYOTqkGxraMNx//xU7SCLf7H+f4r+X80Ye7zu/scVmX ZKHBkOJTVbt1zxdvwc6KrdbyZy5J2S933ns87F9QyozHIXLO1+VmJkz7+eD1dzHVC9xNnjkV xU2951LTL6g6cl3a2ny74Aq/nNdCOdM8S7V3Ku9ZnJ6Fz5xyoD0tQHHm/MgAv0NvFNgWaz7c psRSnJFoqMVcVJwIAOxqU6NMAgAA Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.3 (--) X-LSpam-Report: No, score=-2.3 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_NONE=-0.0001,T_DKIM_INVALID=0.01 autolearn=ham autolearn_force=no Add missing required clocks and supply regulator properties for the sensor input clock and vdd, vdd_io and vaa supply regulators. Signed-off-by: Stefan Riedmueller --- .../devicetree/bindings/media/i2c/mt9p031.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/media/i2c/mt9p031.txt b/Documentation/devicetree/bindings/media/i2c/mt9p031.txt index cb60443ff78f..4437d0e3147d 100644 --- a/Documentation/devicetree/bindings/media/i2c/mt9p031.txt +++ b/Documentation/devicetree/bindings/media/i2c/mt9p031.txt @@ -9,6 +9,12 @@ Required Properties: (a) "aptina,mt9p031" for mt9p031 sensor (b) "aptina,mt9p031m" for mt9p031m sensor +- clocks: Reference to the sensor input clock + +- vdd-supply: VDD supply regulator +- vdd_io-supply: VDD_IO supply regulator +- vaa-supply: VAA supply regulator + - input-clock-frequency: Input clock frequency. - pixel-clock-frequency: Pixel clock frequency. @@ -29,6 +35,12 @@ Example: reg = <0x5d>; reset-gpios = <&gpio3 30 0>; + clocks = <&sensor_clk>; + + vdd-supply = <®_vdd>; + vdd_io-supply = <®_vdd_io>; + vaa-supply = <®_vaa>; + port { mt9p031_1: endpoint { input-clock-frequency = <6000000>; From patchwork Fri Jul 2 09:59:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 75532 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1lzFxP-007rH6-GF; Fri, 02 Jul 2021 09:59:35 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231761AbhGBKCE (ORCPT + 1 other); Fri, 2 Jul 2021 06:02:04 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:55538 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231587AbhGBKB6 (ORCPT ); Fri, 2 Jul 2021 06:01:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a4; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1625219964; x=1627811964; h=From:Sender:Reply-To:Subject:Date:Message-Id:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=CaMLn61Y+ve1XVWW0rnEgj+YIitGaqg0Z0+lCBa6ZHg=; b=Qk68JeVZcGAUDXyQMi2kK/su/eVkOQy5MMlXdtJXL5nh+Ck78KG0HF2FQWRLR+UV iBtKUyqfieZPhA7gqIZc77MNCurrxgxmr0HiT4kEukrE1L7/q9qCmeYl9iEKh6L2 lFYMA7Eq3Yp1MJ9GN9QBGt40aeVmZ5iuEJJaHBOLwa0=; X-AuditID: c39127d2-a9fbd70000001c5e-7b-60dee37cc97e Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id B5.01.07262.C73EED06; Fri, 2 Jul 2021 11:59:24 +0200 (CEST) Received: from lws-riedmueller.phytec.de ([172.16.23.108]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021070211592367-1081049 ; Fri, 2 Jul 2021 11:59:23 +0200 From: Stefan Riedmueller To: Laurent Pinchart , Rob Herring Cc: Mauro Carvalho Chehab , Sakari Ailus , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Stefan Riedmueller Subject: [PATCH v3 4/6] dt-bindings: media: mt9p031: add pclk-sample property Date: Fri, 2 Jul 2021 11:59:20 +0200 Message-Id: <20210702095922.118614-5-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210702095922.118614-1-s.riedmueller@phytec.de> References: <20210702095922.118614-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 02.07.2021 11:59:23, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 02.07.2021 11:59:24 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrJLMWRmVeSWpSXmKPExsWyRoCBS7fm8b0Eg+dTWCzmHznHatE5cQm7 xeVdc9gsejZsZbVYtukPk0Xr3iPsFp+2fGNyYPeY3TGT1WPTqk42j3knAz0+b5ILYInisklJ zcksSy3St0vgyjhxcwVLQQtnRd/Se0wNjMfYuxg5OSQETCQOPl/P1sXIxSEksI1RYtqH61DO NUaJKQuOMIJUsQkYSSyY1sgEYosIREn8PN/DAmIzCzxglNj/KgHEFhbwldjz5jIriM0ioCJx /+lssBpeAVuJVdNOs0Bsk5eYeek72GZOATuJMzePgsWFgGqO9v9ihagXlDg58wlU/RVGiVsr MyFsIYnTi88yQ+zVlli28DXzBEaBWUhaZiFJLWBkWsUolJuZnJ1alJmtV5BRWZKarJeSuokR GLyHJ6pf2sHYN8fjECMTB+MhRgkOZiUR3tB59xKEeFMSK6tSi/Lji0pzUosPMUpzsCiJ827g LQkTEkhPLEnNTk0tSC2CyTJxcEo1MLod9M1ncZAsjNfLPayiYrjyO8f6ulfHefgyalJmBrsY buKtyE448sHpPPuuCe0M0Ryf7uVv/Wb8UTBgnddDxv13BP4sYNpsxFGw+ZorY2FU8fRNpx49 D/MvdFEtab752UIwmdeXLc3wc1ZTudb/ru8/Vzz/t+qQMut92c+OBUHbjy22ky6sVmIpzkg0 1GIuKk4EAHYF7s5MAgAA Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.3 (--) X-LSpam-Report: No, score=-2.3 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_NONE=-0.0001,T_DKIM_INVALID=0.01 autolearn=ham autolearn_force=no Add the pclk-sample property to the list of optional endpoint properties for the mt9p031 camera sensor. Signed-off-by: Stefan Riedmueller --- Documentation/devicetree/bindings/media/i2c/mt9p031.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/media/i2c/mt9p031.txt b/Documentation/devicetree/bindings/media/i2c/mt9p031.txt index 4437d0e3147d..17e44fc6dc66 100644 --- a/Documentation/devicetree/bindings/media/i2c/mt9p031.txt +++ b/Documentation/devicetree/bindings/media/i2c/mt9p031.txt @@ -22,6 +22,10 @@ Required Properties: Optional Properties: - reset-gpios: Chip reset GPIO +Optional endpoint properties: +- pclk-sample: For information see ../video-interfaces.txt. The value is set to + 0 if it isn't specified. + For further reading on port node refer to Documentation/devicetree/bindings/media/video-interfaces.txt. @@ -45,6 +49,7 @@ Example: mt9p031_1: endpoint { input-clock-frequency = <6000000>; pixel-clock-frequency = <96000000>; + pclk-sample = <1>; }; }; }; From patchwork Fri Jul 2 09:59:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 75531 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1lzFxN-007rH6-3u; Fri, 02 Jul 2021 09:59:33 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231572AbhGBKCC (ORCPT + 1 other); Fri, 2 Jul 2021 06:02:02 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:55534 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231575AbhGBKB6 (ORCPT ); Fri, 2 Jul 2021 06:01:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a4; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1625219964; x=1627811964; h=From:Sender:Reply-To:Subject:Date:Message-Id:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=w1EOePrvY2I1BmLZBTkVvG3gIYcpvhoOPqXSOjYRuAE=; b=lZbFwNzsFncD70kQISfEMJ1B23bMiRjDeX1GX0ghYG5uIz4UCpP1QtQbOTSjDW6z gdU1F2/PGXNFRhNvqatXYXuI7SUcrt/oDXzisDGOFdM6s7J5+ftmPH/qTPNzLS0Q EiEyoCx3B2np4CXj25kWmHZr1AH0UCq2rwf6T5hqLlc=; X-AuditID: c39127d2-a77bc70000001c5e-7d-60dee37c68d7 Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 56.01.07262.C73EED06; Fri, 2 Jul 2021 11:59:24 +0200 (CEST) Received: from lws-riedmueller.phytec.de ([172.16.23.108]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021070211592393-1081050 ; Fri, 2 Jul 2021 11:59:23 +0200 From: Stefan Riedmueller To: Laurent Pinchart , Rob Herring Cc: Mauro Carvalho Chehab , Sakari Ailus , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dirk Bender , Stefan Riedmueller Subject: [PATCH v3 5/6] media: mt9p031: Fix corrupted frame after restarting stream Date: Fri, 2 Jul 2021 11:59:21 +0200 Message-Id: <20210702095922.118614-6-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210702095922.118614-1-s.riedmueller@phytec.de> References: <20210702095922.118614-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 02.07.2021 11:59:24, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 02.07.2021 11:59:24 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrBLMWRmVeSWpSXmKPExsWyRoCBS7fm8b0EgyO3pCzmHznHatE5cQm7 xeVdc9gsejZsZbVYtukPk0Xr3iPsFp+2fGNyYPeY3TGT1WPTqk42j3knAz0+b5ILYInisklJ zcksSy3St0vgyvh6bz5zwTWRio6rO5gbGD8LdDFyckgImEis/XuZuYuRi0NIYBujxMqjF9lB EkIC1xglOnttQGw2ASOJBdMamUBsEYEoiZ/ne1hAbGaBJiaJSxd1uxg5OIQFgiUenbEHCbMI qEgs79nKCGLzCthK3P98lgVil7zEzEvfwcZzCthJnLl5lAVila3E0f5frBD1ghInZz5hAblH QuAKo8TU49+ZIZqFJE4vPssMsVdbYtnC18wTGAVmIemZhSS1gJFpFaNQbmZydmpRZrZeQUZl SWqyXkrqJkZg6B6eqH5pB2PfHI9DjEwcjIcYJTiYlUR4Q+fdSxDiTUmsrEotyo8vKs1JLT7E KM3BoiTOu4G3JExIID2xJDU7NbUgtQgmy8TBKdXAuHGa/RwXh2xPv48yC+apn29Usigt+Zd6 LELNJ8nu9n0bV0P/axc/Ntg2zvN+1jb9bI01w59zDSYpW6/Fzjvp/j7d+l6rif5CJzZTp4op kUEHt7K8MwrWf/nB/1zg1IojNy+onDSym1/zeNHH4NqrIc9nfxSKU3myrXmODtuevKnafw5V m/37ocRSnJFoqMVcVJwIALe1pkVLAgAA Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.3 (--) X-LSpam-Report: No, score=-2.3 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_NONE=-0.0001,T_DKIM_INVALID=0.01 autolearn=ham autolearn_force=no From: Dirk Bender To prevent corrupted frames after starting and stopping the sensor its datasheet specifies a specific pause sequence to follow: Stopping: Set Pause_Restart Bit -> Set Restart Bit -> Set Chip_Enable Off Restarting: Set Chip_Enable On -> Clear Pause_Restart Bit The Restart Bit is cleared automatically and must not be cleared manually as this would cause undefined behavior. Signed-off-by: Dirk Bender Signed-off-by: Stefan Riedmueller --- drivers/media/i2c/mt9p031.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c index 6a6f16df3f4a..3511c4ff350d 100644 --- a/drivers/media/i2c/mt9p031.c +++ b/drivers/media/i2c/mt9p031.c @@ -79,7 +79,9 @@ #define MT9P031_PIXEL_CLOCK_INVERT (1 << 15) #define MT9P031_PIXEL_CLOCK_SHIFT(n) ((n) << 8) #define MT9P031_PIXEL_CLOCK_DIVIDE(n) ((n) << 0) -#define MT9P031_FRAME_RESTART 0x0b +#define MT9P031_RESTART 0x0b +#define MT9P031_FRAME_PAUSE_RESTART (1 << 1) +#define MT9P031_FRAME_RESTART (1 << 0) #define MT9P031_SHUTTER_DELAY 0x0c #define MT9P031_RST 0x0d #define MT9P031_RST_ENABLE 1 @@ -482,9 +484,23 @@ static int mt9p031_set_params(struct mt9p031 *mt9p031) static int mt9p031_s_stream(struct v4l2_subdev *subdev, int enable) { struct mt9p031 *mt9p031 = to_mt9p031(subdev); + struct i2c_client *client = v4l2_get_subdevdata(subdev); + int val; int ret; if (!enable) { + /* enable pause restart */ + val = MT9P031_FRAME_PAUSE_RESTART; + ret = mt9p031_write(client, MT9P031_RESTART, val); + if (ret < 0) + return ret; + + /* enable restart + keep pause restart set */ + val |= MT9P031_FRAME_RESTART; + ret = mt9p031_write(client, MT9P031_RESTART, val); + if (ret < 0) + return ret; + /* Stop sensor readout */ ret = mt9p031_set_output_control(mt9p031, MT9P031_OUTPUT_CONTROL_CEN, 0); @@ -504,6 +520,16 @@ static int mt9p031_s_stream(struct v4l2_subdev *subdev, int enable) if (ret < 0) return ret; + /* + * - clear pause restart + * - don't clear restart as clearing restart manually can cause + * undefined behavior + */ + val = MT9P031_FRAME_RESTART; + ret = mt9p031_write(client, MT9P031_RESTART, val); + if (ret < 0) + return ret; + return mt9p031_pll_enable(mt9p031); } From patchwork Fri Jul 2 09:59:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 75533 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1lzFxS-007rIY-4Y; Fri, 02 Jul 2021 09:59:38 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231707AbhGBKCH (ORCPT + 1 other); Fri, 2 Jul 2021 06:02:07 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:55530 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231670AbhGBKB7 (ORCPT ); Fri, 2 Jul 2021 06:01:59 -0400 DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a4; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1625219964; x=1627811964; h=From:Sender:Reply-To:Subject:Date:Message-Id:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=MfDh1elcmtubGEkIf/niQl0eKkFxqT3rHEFU5MzWt8c=; b=hiorjg7GOSVsodHMet9jdop5W948equtlyQk0yKfc2bgBCKgDlskLyBIollJ5wSR OuLRAV4hjwgEtGtITOsvsfMYTumsAsIHDBfDmsXzvArsFwfTkmpLKurewszw1Qxh QsY2xkxVUCjt75c1fNUZ+tiaE3aDDNuklzU3tV9WQRo=; X-AuditID: c39127d2-a9fbd70000001c5e-80-60dee37c2f12 Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 17.01.07262.C73EED06; Fri, 2 Jul 2021 11:59:24 +0200 (CEST) Received: from lws-riedmueller.phytec.de ([172.16.23.108]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021070211592418-1081051 ; Fri, 2 Jul 2021 11:59:24 +0200 From: Stefan Riedmueller To: Laurent Pinchart , Rob Herring Cc: Mauro Carvalho Chehab , Sakari Ailus , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Stefan Riedmueller Subject: [PATCH v3 6/6] media: mt9p031: Use BIT macro Date: Fri, 2 Jul 2021 11:59:22 +0200 Message-Id: <20210702095922.118614-7-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210702095922.118614-1-s.riedmueller@phytec.de> References: <20210702095922.118614-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 02.07.2021 11:59:24, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 02.07.2021 11:59:24 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrFLMWRmVeSWpSXmKPExsWyRoCBS7fm8b0Eg4l/VS3mHznHatE5cQm7 xeVdc9gsejZsZbVYtukPk0Xr3iPsFp+2fGNyYPeY3TGT1WPTqk42j3knAz0+b5ILYInisklJ zcksSy3St0vgypjatIqpYKdYRf+k/cwNjE3CXYycHBICJhIvLrxj6mLk4hAS2MYocfTaJyjn GqPE276zzCBVbAJGEgumNTKB2CICURI/z/ewgNjMAg8YJfa/SgCxhQVMJTZNWwdWwyKgIrHn /VI2EJtXwFbizf5DjBDb5CVmXvrODmJzCthJnLl5FGyOEFDN0f5frBD1ghInZz5hATlCQuAK o8TU49+ZIZqFJE4vhjiIWUBbYtnC18wTGAVmIemZhSS1gJFpFaNQbmZydmpRZrZeQUZlSWqy XkrqJkZg+B6eqH5pB2PfHI9DjEwcjIcYJTiYlUR4Q+fdSxDiTUmsrEotyo8vKs1JLT7EKM3B oiTOu4G3JExIID2xJDU7NbUgtQgmy8TBKdXAGPusbtVlLXaTQMnSqBW7hedsinhxzjVadNWP Iyt3pGTmf6+tTb1buu+wMkOcge2PjlK/wOnyRV48zY4FB+smd/87uHODnexkJeHCMtYW0b7j J41ear156/xsw92yAK6zJ8u+7l/ieTVwz6fPkpLFX85ktut3Sh5e/Fo53SkrY7VRQgzPW54A JZbijERDLeai4kQAY4gW2U0CAAA= Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.3 (--) X-LSpam-Report: No, score=-2.3 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_NONE=-0.0001,T_DKIM_INVALID=0.01 autolearn=ham autolearn_force=no Make use of the BIT macro for setting individual bits. This improves readability and safety with respect to shifts. Signed-off-by: Stefan Riedmueller --- drivers/media/i2c/mt9p031.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c index 3511c4ff350d..0a5bcbebe55f 100644 --- a/drivers/media/i2c/mt9p031.c +++ b/drivers/media/i2c/mt9p031.c @@ -76,39 +76,39 @@ #define MT9P031_PLL_CONFIG_1 0x11 #define MT9P031_PLL_CONFIG_2 0x12 #define MT9P031_PIXEL_CLOCK_CONTROL 0x0a -#define MT9P031_PIXEL_CLOCK_INVERT (1 << 15) +#define MT9P031_PIXEL_CLOCK_INVERT BIT(15) #define MT9P031_PIXEL_CLOCK_SHIFT(n) ((n) << 8) #define MT9P031_PIXEL_CLOCK_DIVIDE(n) ((n) << 0) #define MT9P031_RESTART 0x0b -#define MT9P031_FRAME_PAUSE_RESTART (1 << 1) -#define MT9P031_FRAME_RESTART (1 << 0) +#define MT9P031_FRAME_PAUSE_RESTART BIT(1) +#define MT9P031_FRAME_RESTART BIT(0) #define MT9P031_SHUTTER_DELAY 0x0c #define MT9P031_RST 0x0d #define MT9P031_RST_ENABLE 1 #define MT9P031_RST_DISABLE 0 #define MT9P031_READ_MODE_1 0x1e #define MT9P031_READ_MODE_2 0x20 -#define MT9P031_READ_MODE_2_ROW_MIR (1 << 15) -#define MT9P031_READ_MODE_2_COL_MIR (1 << 14) -#define MT9P031_READ_MODE_2_ROW_BLC (1 << 6) +#define MT9P031_READ_MODE_2_ROW_MIR BIT(15) +#define MT9P031_READ_MODE_2_COL_MIR BIT(14) +#define MT9P031_READ_MODE_2_ROW_BLC BIT(6) #define MT9P031_ROW_ADDRESS_MODE 0x22 #define MT9P031_COLUMN_ADDRESS_MODE 0x23 #define MT9P031_GLOBAL_GAIN 0x35 #define MT9P031_GLOBAL_GAIN_MIN 8 #define MT9P031_GLOBAL_GAIN_MAX 1024 #define MT9P031_GLOBAL_GAIN_DEF 8 -#define MT9P031_GLOBAL_GAIN_MULT (1 << 6) +#define MT9P031_GLOBAL_GAIN_MULT BIT(6) #define MT9P031_ROW_BLACK_TARGET 0x49 #define MT9P031_ROW_BLACK_DEF_OFFSET 0x4b #define MT9P031_GREEN1_OFFSET 0x60 #define MT9P031_GREEN2_OFFSET 0x61 #define MT9P031_BLACK_LEVEL_CALIBRATION 0x62 -#define MT9P031_BLC_MANUAL_BLC (1 << 0) +#define MT9P031_BLC_MANUAL_BLC BIT(0) #define MT9P031_RED_OFFSET 0x63 #define MT9P031_BLUE_OFFSET 0x64 #define MT9P031_TEST_PATTERN 0xa0 #define MT9P031_TEST_PATTERN_SHIFT 3 -#define MT9P031_TEST_PATTERN_ENABLE (1 << 0) +#define MT9P031_TEST_PATTERN_ENABLE BIT(0) #define MT9P031_TEST_PATTERN_DISABLE (0 << 0) #define MT9P031_TEST_PATTERN_GREEN 0xa1 #define MT9P031_TEST_PATTERN_RED 0xa2