From patchwork Fri Sep 25 07:50:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 67338 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1kLidU-005yLX-H1; Fri, 25 Sep 2020 07:59:22 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727132AbgIYIFk (ORCPT + 1 other); Fri, 25 Sep 2020 04:05:40 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:61906 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727067AbgIYIFk (ORCPT ); Fri, 25 Sep 2020 04:05:40 -0400 X-Greylist: delayed 901 seconds by postgrey-1.27 at vger.kernel.org; Fri, 25 Sep 2020 04:05:40 EDT DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a1; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1601020238; x=1603612238; h=From:Sender:Reply-To:Subject:Date:Message-Id:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=j0kqQYL4u8t86vKnzKM+WdGJT8q9+TWpXY5c8+70iWo=; b=nHXWGDnoL6vXSe7HqRozREJDOaivo/1SMXl7Q8O6Lf36syi9AJ1JYKny9Zn4SMN5 kZjKbN5F1oLT8awUjuHE/RtLRisE7GkzqCseDW1EwfYy34eYcRLUum9YgA09rwL0 tIyMag6UvIj7rfOJfnBU0NykQCEyd+0IHJ3g/yjNJgs=; X-AuditID: c39127d2-253ff70000001c25-ef-5f6da14ecba7 Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 1C.A5.07205.E41AD6F5; Fri, 25 Sep 2020 09:50:38 +0200 (CEST) Received: from lws-riedmueller.phytec.de ([172.16.23.108]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2020092509503863-495326 ; Fri, 25 Sep 2020 09:50:38 +0200 From: Stefan Riedmueller To: Laurent Pinchart Cc: Mauro Carvalho Chehab , Sakari Ailus , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, Christian Hemp , Jan Luebbe , Stefan Riedmueller Subject: [PATCH 1/5] media: mt9p031: Add support for 8 bit and 10 bit formats Date: Fri, 25 Sep 2020 09:50:25 +0200 Message-Id: <20200925075029.32181-1-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 25.09.2020 09:50:38, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 25.09.2020 09:50:38 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrALMWRmVeSWpSXmKPExsWyRoCBS9dvYW68wZVtOhZf58xjteicuITd 4vKuOWwWPRu2slos2/SHyeLTlm9MDmwesztmsnpsWtXJ5jHvZKBH/18Dj8+b5AJYo7hsUlJz MstSi/TtErgy3i8/wFjwWaGis+8MWwNjj0wXIweHhICJxKnDEl2MXBxCAtsYJSZNbmWHcK4x SrT/esjUxcjJwSZgJLFgWiOYLSJgIdG7aDojSBGzQAeTRN+n02wgCWEBX4n3vx4zg9gsAqoS m59vYwexeQVsJM5tngFWIyEgLzHz0neouKDEyZlPWCDiVxglNj7XgLCFJE4vPgs2h1lAW2LZ wtfMExj5ZiFpmYUktYCRaRWjUG5mcnZqUWa2XkFGZUlqsl5K6iZGYCgenqh+aQdj3xyPQ4xM HIyHGCU4mJVEeI9vyIkX4k1JrKxKLcqPLyrNSS0+xCjNwaIkzruBtyRMSCA9sSQ1OzW1ILUI JsvEwSnVwFhQs9N/5qFH/DP0J1eGW3+9ce3FnuV1e5Y2BptoNN5svmZ0aPbqhlOSrae3pOcu U3v0um32p3Wswbpp/Sonkr9dvifoG22XzNywLkSq+v9lkwsfbN0Oi2wVfK63uN6p6LHDi7Qp jdLaZ/ICsnPlVD4KW//imidbvaPv7TKhNT/Wst7PEmVL26LEUpyRaKjFXFScCABGoN4KMwIA AA== Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.3 (--) X-LSpam-Report: No, score=-2.3 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,T_DKIM_INVALID=0.01 autolearn=ham autolearn_force=no From: Christian Hemp Aside from 12 bit monochrome or color format the sensor implicitly supports 10 and 8 bit formats as well by simply dropping the corresponding LSBs. Signed-off-by: Christian Hemp [jlu@pengutronix.de: simplified by dropping v4l2_colorspace handling] Signed-off-by: Jan Luebbe Signed-off-by: Stefan Riedmueller Reported-by: kernel test robot --- drivers/media/i2c/mt9p031.c | 50 +++++++++++++++++++++++++++++-------- 1 file changed, 40 insertions(+), 10 deletions(-) diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c index dc23b9ed510a..0002dd299ffa 100644 --- a/drivers/media/i2c/mt9p031.c +++ b/drivers/media/i2c/mt9p031.c @@ -116,6 +116,18 @@ enum mt9p031_model { MT9P031_MODEL_MONOCHROME, }; +static const u32 mt9p031_color_fmts[] = { + MEDIA_BUS_FMT_SGRBG8_1X8, + MEDIA_BUS_FMT_SGRBG10_1X10, + MEDIA_BUS_FMT_SGRBG12_1X12, +}; + +static const u32 mt9p031_monochrome_fmts[] = { + MEDIA_BUS_FMT_Y8_1X8, + MEDIA_BUS_FMT_Y10_1X10, + MEDIA_BUS_FMT_Y12_1X12, +}; + struct mt9p031 { struct v4l2_subdev subdev; struct media_pad pad; @@ -138,6 +150,9 @@ struct mt9p031 { struct v4l2_ctrl *blc_auto; struct v4l2_ctrl *blc_offset; + const u32 *fmts; + int num_fmts; + /* Registers cache */ u16 output_control; u16 mode2; @@ -148,6 +163,17 @@ static struct mt9p031 *to_mt9p031(struct v4l2_subdev *sd) return container_of(sd, struct mt9p031, subdev); } +static const u32 mt9p031_find_datafmt(struct mt9p031 *mt9p031, u32 code) +{ + int i; + + for (i = 0; i < mt9p031->num_fmts; i++) + if (mt9p031->fmts[i] == code) + return mt9p031->fmts[i]; + + return mt9p031->fmts[mt9p031->num_fmts-1]; +} + static int mt9p031_read(struct i2c_client *client, u8 reg) { return i2c_smbus_read_word_swapped(client, reg); @@ -476,10 +502,11 @@ static int mt9p031_enum_mbus_code(struct v4l2_subdev *subdev, { struct mt9p031 *mt9p031 = to_mt9p031(subdev); - if (code->pad || code->index) + if (code->pad || code->index >= mt9p031->num_fmts) return -EINVAL; - code->code = mt9p031->format.code; + code->code = mt9p031->fmts[code->index]; + return 0; } @@ -573,6 +600,8 @@ static int mt9p031_set_format(struct v4l2_subdev *subdev, __format->width = __crop->width / hratio; __format->height = __crop->height / vratio; + __format->code = mt9p031_find_datafmt(mt9p031, format->format.code); + format->format = *__format; return 0; @@ -951,10 +980,7 @@ static int mt9p031_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) format = v4l2_subdev_get_try_format(subdev, fh->pad, 0); - if (mt9p031->model == MT9P031_MODEL_MONOCHROME) - format->code = MEDIA_BUS_FMT_Y12_1X12; - else - format->code = MEDIA_BUS_FMT_SGRBG12_1X12; + format->code = mt9p031_find_datafmt(mt9p031, 0); format->width = MT9P031_WINDOW_WIDTH_DEF; format->height = MT9P031_WINDOW_HEIGHT_DEF; @@ -1121,10 +1147,14 @@ static int mt9p031_probe(struct i2c_client *client, mt9p031->crop.left = MT9P031_COLUMN_START_DEF; mt9p031->crop.top = MT9P031_ROW_START_DEF; - if (mt9p031->model == MT9P031_MODEL_MONOCHROME) - mt9p031->format.code = MEDIA_BUS_FMT_Y12_1X12; - else - mt9p031->format.code = MEDIA_BUS_FMT_SGRBG12_1X12; + if (mt9p031->model == MT9P031_MODEL_MONOCHROME) { + mt9p031->fmts = mt9p031_monochrome_fmts; + mt9p031->num_fmts = ARRAY_SIZE(mt9p031_monochrome_fmts); + } else { + mt9p031->fmts = mt9p031_color_fmts; + mt9p031->num_fmts = ARRAY_SIZE(mt9p031_color_fmts); + } + mt9p031->format.code = mt9p031_find_datafmt(mt9p031, 0); mt9p031->format.width = MT9P031_WINDOW_WIDTH_DEF; mt9p031->format.height = MT9P031_WINDOW_HEIGHT_DEF; From patchwork Fri Sep 25 07:50:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 67339 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1kLidj-005yM2-L6; Fri, 25 Sep 2020 07:59:37 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727454AbgIYIF5 (ORCPT + 1 other); Fri, 25 Sep 2020 04:05:57 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:61918 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727324AbgIYIF4 (ORCPT ); Fri, 25 Sep 2020 04:05:56 -0400 DKIM-Signature: v=1; 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Fri, 25 Sep 2020 09:50:43 +0200 From: Stefan Riedmueller To: Laurent Pinchart Cc: Mauro Carvalho Chehab , Sakari Ailus , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, Enrico Scholz , Stefan Riedmueller Subject: [PATCH 2/5] media: mt9p031: Read back the real clock rate Date: Fri, 25 Sep 2020 09:50:26 +0200 Message-Id: <20200925075029.32181-2-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200925075029.32181-1-s.riedmueller@phytec.de> References: <20200925075029.32181-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 25.09.2020 09:50:43, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 25.09.2020 09:50:43 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrJLMWRmVeSWpSXmKPExsWyRoCBSzd4YW68wdk5ShZ7j11gseicuITd 4vKuOWwWPRu2slos2/SHyeLTlm9MDmwesztmsnpsWtXJ5jHvZKDHipX/mTw+b5ILYI3isklJ zcksSy3St0vgyri5+yhjwX++iilr/zI2MJ7i6WLk5JAQMJGYcu4LSxcjF4eQwDZGib7nb9lA EkIC1xgllvUqg9hsAkYSC6Y1MoHYIgIWEr2LpjOC2MwCXxkl1p3NBrGFBZwkbvZNBYuzCKhK rNi6HmwOr4CNxKVjF9kglslLzLz0nR3E5hSwlTj69jwTxC4biRc7/jJC1AtKnJz5BOwgCYEr jBLbWzewQjQLSZxefJYZYrG2xLKFr5knMArMQtIzC0lqASPTKkah3Mzk7NSizGy9gozKktRk vZTUTYzA4D08Uf3SDsa+OR6HGJk4GA8xSnAwK4nwHt+QEy/Em5JYWZValB9fVJqTWnyIUZqD RUmcdwNvSZiQQHpiSWp2ampBahFMlomDU6qBcbLBpc+RcpmPLivGfGnozf14U1inuVGs/6Df 6y07njwXM5+87fHuuOK/t4PW382MbN+sJSuy4C/Di3y7/63ts2R0LRpczQ7K1S3lvXnp+eRT VocD5jFzHb1e5qV/ysmjfmFtzA62B4dXqfukT1mYM8Mk1+YRd8aTXzta2DUOOydJ5Ipa3OUS VmIpzkg01GIuKk4EAEcXl6dMAgAA Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.3 (--) X-LSpam-Report: No, score=-2.3 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,T_DKIM_INVALID=0.01 autolearn=ham autolearn_force=no From: Enrico Scholz The real and requested clock can differ and because it is used to calculate PLL values, the real clock rate should be read. Signed-off-by: Enrico Scholz Signed-off-by: Stefan Riedmueller --- drivers/media/i2c/mt9p031.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c index 0002dd299ffa..ce192be4531f 100644 --- a/drivers/media/i2c/mt9p031.c +++ b/drivers/media/i2c/mt9p031.c @@ -255,6 +255,7 @@ static int mt9p031_clk_setup(struct mt9p031 *mt9p031) struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev); struct mt9p031_platform_data *pdata = mt9p031->pdata; + unsigned long ext_freq; int ret; mt9p031->clk = devm_clk_get(&client->dev, NULL); @@ -265,13 +266,15 @@ static int mt9p031_clk_setup(struct mt9p031 *mt9p031) if (ret < 0) return ret; + ext_freq = clk_get_rate(mt9p031->clk); + /* If the external clock frequency is out of bounds for the PLL use the * pixel clock divider only and disable the PLL. */ - if (pdata->ext_freq > limits.ext_clock_max) { + if (ext_freq > limits.ext_clock_max) { unsigned int div; - div = DIV_ROUND_UP(pdata->ext_freq, pdata->target_freq); + div = DIV_ROUND_UP(ext_freq, pdata->target_freq); div = roundup_pow_of_two(div) / 2; mt9p031->clk_div = min_t(unsigned int, div, 64); @@ -280,7 +283,7 @@ static int mt9p031_clk_setup(struct mt9p031 *mt9p031) return 0; } - mt9p031->pll.ext_clock = pdata->ext_freq; + mt9p031->pll.ext_clock = ext_freq; mt9p031->pll.pix_clock = pdata->target_freq; mt9p031->use_pll = true; From patchwork Fri Sep 25 07:50:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 67340 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1kLidm-005yM2-GC; Fri, 25 Sep 2020 07:59:39 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727461AbgIYIF5 (ORCPT + 1 other); Fri, 25 Sep 2020 04:05:57 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:61920 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727201AbgIYIF4 (ORCPT ); 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Fri, 25 Sep 2020 09:50:45 +0200 From: Stefan Riedmueller To: Laurent Pinchart Cc: Mauro Carvalho Chehab , Sakari Ailus , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, Enrico Scholz , Stefan Riedmueller Subject: [PATCH 3/5] media: mt9p031: Implement [gs]_register debug calls Date: Fri, 25 Sep 2020 09:50:27 +0200 Message-Id: <20200925075029.32181-3-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200925075029.32181-1-s.riedmueller@phytec.de> References: <20200925075029.32181-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 25.09.2020 09:50:45, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 25.09.2020 09:50:45 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrJLMWRmVeSWpSXmKPExsWyRoCBSzd0YW68wY4+EYu9xy6wWHROXMJu cXnXHDaLng1bWS2WbfrDZPFpyzcmBzaP2R0zWT02repk85h3MtBjxcr/TB6fN8kFsEZx2aSk 5mSWpRbp2yVwZbzZc5WpoIO/YtO/VtYGxvs8XYycHBICJhKf701gBLGFBLYxSmw5WNDFyAVk X2OUePZrGztIgk3ASGLBtEYmEFtEwEKid9F0sAZmga+MEuvOZoPYwgIeEo2NK8DqWQRUJZYt 6WQFsXkFbCROvf3GCLFMXmLmpe9gNZwCthJH355nglhsI/Fix19GiHpBiZMzn7CAHCEhcIVR ov/UDDaIZiGJ04vPMkMs1pZYtvA18wRGgVlIemYhSS1gZFrFKJSbmZydWpSZrVeQUVmSmqyX krqJERi8hyeqX9rB2DfH4xAjEwfjIUYJDmYlEd7jG3LihXhTEiurUovy44tKc1KLDzFKc7Ao ifNu4C0JExJITyxJzU5NLUgtgskycXBKNTAuvRvCLuG22kauZ6Z8d4Fu35+2Q2Zx7lXrPh0L ThDY2aGs8s989fMbv3fasogqZH1QWmwmeuiY+IxYwZzcL7M6Dcuc3fiX54m4PFawO1ItZ79v m9gXl7YzLY2fPMRVZn/6+EJwve3Kj86Mm2+xHQ3asJCT4Y9PuMaLxuj/ey9zLT17YovCvhIl luKMREMt5qLiRADUtBXmTAIAAA== Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.3 (--) X-LSpam-Report: No, score=-2.3 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,T_DKIM_INVALID=0.01 autolearn=ham autolearn_force=no From: Enrico Scholz Implement g_register and s_register v4l2_subdev_core_ops to access camera register directly from userspace for debug purposes. Signed-off-by: Enrico Scholz Signed-off-by: Stefan Riedmueller --- drivers/media/i2c/mt9p031.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c index ce192be4531f..f5d6a7890c47 100644 --- a/drivers/media/i2c/mt9p031.c +++ b/drivers/media/i2c/mt9p031.c @@ -703,6 +703,30 @@ static int mt9p031_restore_blc(struct mt9p031 *mt9p031) return 0; } +#ifdef CONFIG_VIDEO_ADV_DEBUG +static int mt9p031_g_register(struct v4l2_subdev *sd, + struct v4l2_dbg_register *reg) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + ret = mt9p031_read(client, reg->reg); + if (ret < 0) + return ret; + + reg->val = ret; + return 0; +} + +static int mt9p031_s_register(struct v4l2_subdev *sd, + struct v4l2_dbg_register const *reg) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + return mt9p031_write(client, reg->reg, reg->val); +} +#endif + static int mt9p031_s_ctrl(struct v4l2_ctrl *ctrl) { struct mt9p031 *mt9p031 = @@ -1000,6 +1024,10 @@ static int mt9p031_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) static const struct v4l2_subdev_core_ops mt9p031_subdev_core_ops = { .s_power = mt9p031_set_power, +#ifdef CONFIG_VIDEO_ADV_DEBUG + .s_register = mt9p031_s_register, + .g_register = mt9p031_g_register, +#endif }; static const struct v4l2_subdev_video_ops mt9p031_subdev_video_ops = { From patchwork Fri Sep 25 07:50:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 67341 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1kLido-005yMc-To; Fri, 25 Sep 2020 07:59:41 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727463AbgIYIGD (ORCPT + 1 other); Fri, 25 Sep 2020 04:06:03 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:61920 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727135AbgIYIF5 (ORCPT ); Fri, 25 Sep 2020 04:05:57 -0400 DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a1; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1601020247; x=1603612247; h=From:Sender:Reply-To:Subject:Date:Message-Id:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=m09GuPxODIBi6CsANbjfMfr/YvqAFgMfC3Wj/NunD5c=; b=G5HqRrJmTZI22TXQD/hef/gHRyscv00cnEK5uRaiQ5JXXIEQMxdRTmj5+fWzPhag xwsdlDfCy6SlE+x9yeo970ZkfQLp1W118ukE8+sQHVLeN+r9DqaHQ8y8jpBJhvED zwnDCD5yvLL2jGZTnHOR9r8i44COhkXoU2ce62RbW0k=; X-AuditID: c39127d2-253ff70000001c25-f5-5f6da157af91 Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id DD.A5.07205.751AD6F5; Fri, 25 Sep 2020 09:50:47 +0200 (CEST) Received: from lws-riedmueller.phytec.de ([172.16.23.108]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2020092509504720-495333 ; Fri, 25 Sep 2020 09:50:47 +0200 From: Stefan Riedmueller To: Laurent Pinchart Cc: Mauro Carvalho Chehab , Sakari Ailus , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, Christian Hemp , Stefan Riedmueller Subject: [PATCH 4/5] media: mt9p031: Make pixel clock polarity configurable by DT Date: Fri, 25 Sep 2020 09:50:28 +0200 Message-Id: <20200925075029.32181-4-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200925075029.32181-1-s.riedmueller@phytec.de> References: <20200925075029.32181-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 25.09.2020 09:50:47, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 25.09.2020 09:50:47 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrALMWRmVeSWpSXmKPExsWyRoCBSzd8YW68wf7pihadE5ewW1zeNYfN omfDVlaLZZv+MFl82vKNyYHVY3bHTFaPTas62TzmnQz0+LxJLoAlissmJTUnsyy1SN8ugStj zrldrAWtUhXL5ncyNTD2inUxcnJICJhI3G2ezQxiCwlsY5R48Fmgi5ELyL7GKHGqaTkLSIJN wEhiwbRGJhBbRMBConfRdEaQImaB54wSc7bvYgRJCAsESvw7vIwdxGYRUJW48esSG4jNK2Aj 8XXTbFaIbfISMy99B6vhFLCVOPr2PBPEZhuJFzv+MkLUC0qcnPmEBWSBhMAVRomZh3qZIZqF JE4vPgtmMwtoSyxb+Jp5AqPALCQ9s5CkFjAyrWIUys1Mzk4tyszWK8ioLElN1ktJ3cQIDNXD E9Uv7WDsm+NxiJGJg/EQowQHs5II7/ENOfFCvCmJlVWpRfnxRaU5qcWHGKU5WJTEeTfwloQJ CaQnlqRmp6YWpBbBZJk4OKUaGA9wTRR0PiC+yMNiyhQdkW2tbqt9mHdqN2xwkP8YvOFHScuk TGFePYXa+w3qimIM63hKynedm9p1eHfu5sbsqjVNHcum1a19n9YQsiyG+e2tL+cCbz/zniyo 36n099SaFeHmH28Iyx69vNBxwxVJrs6VaVPC2g0ObVfjeOP9ofaL6ZaOne/dapVYijMSDbWY i4oTAVrdt5xDAgAA Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.3 (--) X-LSpam-Report: No, score=-2.3 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,T_DKIM_INVALID=0.01 autolearn=ham autolearn_force=no From: Christian Hemp Evaluate the desired pixel clock polarity from the device tree. Signed-off-by: Christian Hemp Signed-off-by: Stefan Riedmueller --- drivers/media/i2c/Kconfig | 1 + drivers/media/i2c/mt9p031.c | 19 ++++++++++++++++++- include/media/i2c/mt9p031.h | 1 + 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index c7ba76fee599..7c026daeacf0 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -1103,6 +1103,7 @@ config VIDEO_MT9P031 select MEDIA_CONTROLLER select VIDEO_V4L2_SUBDEV_API select VIDEO_APTINA_PLL + select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the Aptina (Micron) mt9p031 5 Mpixel camera. diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c index f5d6a7890c47..8f8ee37a2dd2 100644 --- a/drivers/media/i2c/mt9p031.c +++ b/drivers/media/i2c/mt9p031.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include "aptina-pll.h" @@ -399,6 +400,14 @@ static int __mt9p031_set_power(struct mt9p031 *mt9p031, bool on) return ret; } + /* Configure the pixel clock polarity */ + if (mt9p031->pdata && mt9p031->pdata->pixclk_pol) { + ret = mt9p031_write(client, MT9P031_PIXEL_CLOCK_CONTROL, + MT9P031_PIXEL_CLOCK_INVERT); + if (ret < 0) + return ret; + } + return v4l2_ctrl_handler_setup(&mt9p031->ctrls); } @@ -1062,7 +1071,8 @@ static const struct v4l2_subdev_internal_ops mt9p031_subdev_internal_ops = { static struct mt9p031_platform_data * mt9p031_get_pdata(struct i2c_client *client) { - struct mt9p031_platform_data *pdata; + struct mt9p031_platform_data *pdata = NULL; + struct v4l2_fwnode_endpoint endpoint; struct device_node *np; if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node) @@ -1072,6 +1082,10 @@ mt9p031_get_pdata(struct i2c_client *client) if (!np) return NULL; + endpoint.bus_type = V4L2_MBUS_UNKNOWN; + if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &endpoint) < 0) + goto done; + pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL); if (!pdata) goto done; @@ -1079,6 +1093,9 @@ mt9p031_get_pdata(struct i2c_client *client) of_property_read_u32(np, "input-clock-frequency", &pdata->ext_freq); of_property_read_u32(np, "pixel-clock-frequency", &pdata->target_freq); + pdata->pixclk_pol = !!(endpoint.bus.parallel.flags & + V4L2_MBUS_PCLK_SAMPLE_RISING); + done: of_node_put(np); return pdata; diff --git a/include/media/i2c/mt9p031.h b/include/media/i2c/mt9p031.h index 7c29c53aa988..f933cd0be8e5 100644 --- a/include/media/i2c/mt9p031.h +++ b/include/media/i2c/mt9p031.h @@ -10,6 +10,7 @@ struct v4l2_subdev; * @target_freq: Pixel clock frequency */ struct mt9p031_platform_data { + unsigned int pixclk_pol:1; int ext_freq; int target_freq; }; From patchwork Fri Sep 25 07:50:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 67342 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1kLidq-005yMc-77; Fri, 25 Sep 2020 07:59:42 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727464AbgIYIGD (ORCPT + 1 other); Fri, 25 Sep 2020 04:06:03 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:61918 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727450AbgIYIF6 (ORCPT ); Fri, 25 Sep 2020 04:05:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a1; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1601020249; x=1603612249; h=From:Sender:Reply-To:Subject:Date:Message-Id:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=W2ZrFbcxd4kDGmQO+BiozH8E+vz+f2nc13eOaGw19XE=; b=iBv1bbb92r0yTpZ1wcrPTdMU0eDJuIRsNLu1ysrjHn9DIrFDPeSZokfc7RDW19Eu nDpGWm12wQTokuRjBp8UN6hyWcwzhHREOPQ0Hv4m9XgdTtgALJd3hAeuUelAQXXz RUv3Xh2aiodZZkIBv6xbTQfQXqd6p/uiQU/28e4tF3o=; X-AuditID: c39127d2-253ff70000001c25-f6-5f6da159bed7 Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 3E.A5.07205.951AD6F5; Fri, 25 Sep 2020 09:50:49 +0200 (CEST) Received: from lws-riedmueller.phytec.de ([172.16.23.108]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2020092509504915-495334 ; Fri, 25 Sep 2020 09:50:49 +0200 From: Stefan Riedmueller To: Laurent Pinchart Cc: Mauro Carvalho Chehab , Sakari Ailus , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, Dirk Bender , Stefan Riedmueller Subject: [PATCH 5/5] media: mt9p031: Fix corrupted frame after restarting stream Date: Fri, 25 Sep 2020 09:50:29 +0200 Message-Id: <20200925075029.32181-5-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200925075029.32181-1-s.riedmueller@phytec.de> References: <20200925075029.32181-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 25.09.2020 09:50:49, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 25.09.2020 09:50:49 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrPLMWRmVeSWpSXmKPExsWyRoCBSzdyYW68we1vchadE5ewW1zeNYfN omfDVlaLZZv+MFl82vKNyYHVY3bHTFaPTas62TzmnQz0+LxJLoAlissmJTUnsyy1SN8ugSvj zptbTAUnRSquH3rN0sDYJtjFyMkhIWAisX/pB0YQW0hgG6PE1W25EPY1Rom7D8tBbDYBI4kF 0xqZQGwRAQuJ3kXTgeq5OJgFnjFKtLe1soEkhAUCJP5Pm8gOYrMIqEqs+3yCBcTmFbCRODDl MBvEMnmJmZe+g9VwCthKHH17nglimY3Eix1/GSHqBSVOznzCArJAQuAKo8TpT7NYIJqFJE4v PssMYjMLaEssW/iaeQKjwCwkPbOQpBYwMq1iFMrNTM5OLcrM1ivIqCxJTdZLSd3ECAzUwxPV L+1g7JvjcYiRiYPxEKMEB7OSCO/xDTnxQrwpiZVVqUX58UWlOanFhxilOViUxHk38JaECQmk J5akZqemFqQWwWSZODilGhgNvl7u+cFwsGfvDN7Z/0z2X1u9n2tH9SqPjyzzcm3OOWb2nkus bSl4mlM0b5Vz9mRBP4/nuxfL/Jv8cIbwvrSgU47TZjp1OLr82mAWGniU+cb9f88UGmy6Y2TM Zj9uNud101635cbUFd7vubLtDM6Xbyn6djVPW6ugV/bTmsOL+M/L+eh3lfxWYinOSDTUYi4q TgQA/2/8F0ICAAA= Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.3 (--) X-LSpam-Report: No, score=-2.3 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,T_DKIM_INVALID=0.01 autolearn=ham autolearn_force=no From: Dirk Bender To prevent corrupted frames after starting and stopping the sensor it's datasheet specifies a specific pause sequence to follow: Stopping: Set Pause_Restart Bit -> Set Restart Bit -> Set Chip_Enable Off Restarting: Set Chip_Enable On -> Clear Pause_Restart Bit The Restart Bit is cleared automatically and must not be cleared manually as this would cause undefined behavior. Signed-off-by: Dirk Bender Signed-off-by: Stefan Riedmueller --- drivers/media/i2c/mt9p031.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c index 8f8ee37a2dd2..2f2daf95dcd3 100644 --- a/drivers/media/i2c/mt9p031.c +++ b/drivers/media/i2c/mt9p031.c @@ -80,6 +80,8 @@ #define MT9P031_PIXEL_CLOCK_SHIFT(n) ((n) << 8) #define MT9P031_PIXEL_CLOCK_DIVIDE(n) ((n) << 0) #define MT9P031_FRAME_RESTART 0x0b +#define MT9P031_FRAME_RESTART_SET (1 << 0) +#define MT9P031_FRAME_PAUSE_RESTART_SET (1 << 1) #define MT9P031_SHUTTER_DELAY 0x0c #define MT9P031_RST 0x0d #define MT9P031_RST_ENABLE 1 @@ -483,9 +485,25 @@ static int mt9p031_set_params(struct mt9p031 *mt9p031) static int mt9p031_s_stream(struct v4l2_subdev *subdev, int enable) { struct mt9p031 *mt9p031 = to_mt9p031(subdev); + struct i2c_client *client = v4l2_get_subdevdata(subdev); + int val; int ret; if (!enable) { + val = mt9p031_read(client, MT9P031_FRAME_RESTART); + + /* enable pause restart */ + val |= MT9P031_FRAME_PAUSE_RESTART_SET; + ret = mt9p031_write(client, MT9P031_FRAME_RESTART, val); + if (ret < 0) + return ret; + + /* enable restart + keep pause restart set */ + val |= MT9P031_FRAME_RESTART_SET; + ret = mt9p031_write(client, MT9P031_FRAME_RESTART, val); + if (ret < 0) + return ret; + /* Stop sensor readout */ ret = mt9p031_set_output_control(mt9p031, MT9P031_OUTPUT_CONTROL_CEN, 0); @@ -505,6 +523,13 @@ static int mt9p031_s_stream(struct v4l2_subdev *subdev, int enable) if (ret < 0) return ret; + val = mt9p031_read(client, MT9P031_FRAME_RESTART); + /* disable reset + pause restart */ + val &= ~MT9P031_FRAME_PAUSE_RESTART_SET; + ret = mt9p031_write(client, MT9P031_FRAME_RESTART, val); + if (ret < 0) + return ret; + return mt9p031_pll_enable(mt9p031); }