From patchwork Wed Sep 4 11:10:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 103963 Received: from sv.mirrors.kernel.org ([139.178.88.99]) by linuxtv.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1slnvt-0006C1-1f for patchwork@linuxtv.org; Wed, 04 Sep 2024 11:12:18 +0000 Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id CAE0C285676 for ; Wed, 4 Sep 2024 11:12:16 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 286A31D0169; Wed, 4 Sep 2024 11:12:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="hLL8bmqz" X-Original-To: linux-media@vger.kernel.org Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01C221CF7AC; Wed, 4 Sep 2024 11:11:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448321; cv=none; b=UDl5jQwLHggEn21ro56/67pJ/fjXsSr4TAIMb5Wqs571h24W7oKWXKax1DX9gYaYMm8lXb1VJV1Of/T3Cdrddjnn2sjKw2WXW5EYNozx7o0RBBvGxtmUD+dyEY8ApENbcFyMQHJjI3sZg1VOETuYjkmZV7mFXG6VBB9/q3NgbAo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448321; c=relaxed/simple; bh=OMIotoo1f4MVFOEQwbAjTJ5XoFssgvmRY7kgHUT2m9g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=CyybgDyY5gpiBpYG/a6gufwMOOB7aAsvD3G0sSTTNnomd2tB1hnpAdhs32nlzIxCcoDEnHvmxzc5IaR5xpJ7l6VYFc8N/fVvrwXSmr6zsrJ1cSM95ra2H7bJI9VvV0vk8Ug/Q2PkR3S6g3aFfzF9vpjy15YSrTzZuF3jraud+nY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=hLL8bmqz; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4844XvDk019877; Wed, 4 Sep 2024 11:11:44 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= sBm94gTM1ZHaYT4dFpaWU9u+jG/kNBqcujZAnbNTVRw=; b=hLL8bmqz8/wch16z pvof3iEXnQn9FCpSpebAmsEG52zCR8inyRW5/uR+Afn7hZ+gA1oXA2YM78iMUxFu A5JH2dzQfxC9lk1yAv2B8nAbf/YwQtIWQvf+cUO2NV6UrQXmO0aCaDOykQ5kIM9W SC2FhBdnJX2BRyTDBCGzQBcGndkOqQ5XJ2RJo4OmzlQleXc1UtBUvT2AHz89mIWE 6oRFMwH6PDfGNf/ezqlNUPOofYQo/eIDM70jI7kUJRLiIhsdng+lkAZTnX6lEjHQ FjQCnM9y2Txw2imuPW1mqUH8y6AYWZv/DqWL/fEp7kZWxTenLw6Zdjtx3zFgpsdy dT/VZw== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41egmrryjj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 11:11:44 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 484BBgIb023782 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Sep 2024 11:11:42 GMT Received: from [169.254.0.1] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Sep 2024 04:11:36 -0700 From: Vikram Sharma Date: Wed, 4 Sep 2024 16:40:07 +0530 Subject: [PATCH 01/10] media: dt-bindings: media: camss: Add qcom,sc7280-camss binding Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-1-b18ddcd7d9df@quicinc.com> References: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> In-Reply-To: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> To: Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kapatrala Syed , Hariram Purushothaman , "Bjorn Andersson" , Konrad Dybcio , Hans Verkuil , , Catalin Marinas , Will Deacon CC: , , , , , Vikram Sharma , Suresh Vankadara , Trishansh Bhardwaj X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1725448289; l=13041; i=quic_vikramsa@quicinc.com; s=20240628; h=from:subject:message-id; bh=OMIotoo1f4MVFOEQwbAjTJ5XoFssgvmRY7kgHUT2m9g=; b=P/nQqEEQR+PhR2V7Cv0QA80VazJy/L0rUh1H9RqiIjyexunF9tC805UAPgnGWR5V/n/ABqNLt 7k7eC7hhPU6DhXmAJ9AWuzyI49xLnf43LncQiaXn/jiG1FDpKxY3sxI X-Developer-Key: i=quic_vikramsa@quicinc.com; a=ed25519; pk=vQBkwZr1Hv+VXogAyTAu7AEx8/6bvkOmgrzYFbNGCDI= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 5RG0IaMdYDDbUtkfiCHhoXhocaWjVjue X-Proofpoint-GUID: 5RG0IaMdYDDbUtkfiCHhoXhocaWjVjue X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_09,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 suspectscore=0 phishscore=0 lowpriorityscore=0 mlxscore=0 mlxlogscore=999 spamscore=0 malwarescore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040084 X-LSpam-Score: -8.6 (--------) X-LSpam-Report: No, score=-8.6 required=5.0 tests=ARC_SIGNED=0.001,ARC_VALID=-0.1,BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,DMARC_PASS=-0.001,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_MED=-2.3,RCVD_IN_VALIDITY_CERTIFIED=-3,RCVD_IN_VALIDITY_RPBL=1.31,RCVD_IN_VALIDITY_SAFE=-2,SPF_HELO_NONE=0.001,SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no Add bindings for qcom,sc7280-camss to support the camera subsystem on the SC7280 platform. Signed-off-by: Suresh Vankadara Signed-off-by: Trishansh Bhardwaj Signed-off-by: Vikram Sharma --- .../bindings/media/qcom,sc7280-camss.yaml | 441 +++++++++++++++++++++ 1 file changed, 441 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml new file mode 100644 index 000000000000..dee244e621c8 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml @@ -0,0 +1,441 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 + +--- +$id: http://devicetree.org/schemas/media/qcom,sc7280-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC7280 CAMSS ISP + +maintainers: + - Azam Sadiq Pasha Kapatrala Syed + - Hariram Purushothaman + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. + +properties: + compatible: + const: qcom,sc7280-camss + + clocks: + maxItems: 33 + + clock-names: + items: + - const: camnoc_axi + - const: cpas_ahb + - const: csi0 + - const: csi1 + - const: csi2 + - const: csi3 + - const: csi4 + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: csiphy3 + - const: csiphy3_timer + - const: csiphy4 + - const: csiphy4_timer + - const: gcc_camera_ahb + - const: gcc_camera_axi + - const: soc_ahb + - const: vfe0_axi + - const: vfe0 + - const: vfe0_cphy_rx + - const: vfe1_axi + - const: vfe1 + - const: vfe1_cphy_rx + - const: vfe2_axi + - const: vfe2 + - const: vfe2_cphy_rx + - const: vfe0_lite + - const: vfe0_lite_cphy_rx + - const: vfe1_lite + - const: vfe1_lite_cphy_rx + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: ahb + - const: hf_0 + + interrupts: + maxItems: 15 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csid_lite0 + - const: csid_lite1 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csiphy3 + - const: csiphy4 + - const: vfe0 + - const: vfe1 + - const: vfe2 + - const: vfe_lite0 + - const: vfe_lite1 + + iommus: + maxItems: 1 + + power-domains: + items: + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. + - description: IFE2 GDSC - Image Front End, Global Distributed Switch Controller. + - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller. + + power-domains-names: + items: + - const: ife0 + - const: ife1 + - const: ife2 + - const: top + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + + port@3: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + + port@4: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + + port@5: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + + reg: + maxItems: 15 + + reg-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csid_lite0 + - const: csid_lite1 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csiphy3 + - const: csiphy4 + - const: vfe0 + - const: vfe1 + - const: vfe2 + - const: vfe_lite0 + - const: vfe_lite1 + + vdda-phy-supply: + description: + Phandle to a regulator supply to PHY core block. + + vdda-pll-supply: + description: + Phandle to 1.8V regulator supply to PHY refclk pll block. + +required: + - clock-names + - clocks + - compatible + - interconnects + - interconnect-names + - interrupts + - interrupt-names + - iommus + - power-domains + - power-domains-names + - reg + - reg-names + - vdda-phy-supply + - vdda-pll-supply + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + camss: camss@acaf000 { + compatible = "qcom,sc7280-camss"; + + clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_0_CSID_CLK>, + <&clock_camcc CAM_CC_IFE_1_CSID_CLK>, + <&clock_camcc CAM_CC_IFE_2_CSID_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_0_CSID_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_1_CSID_CLK>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&clock_camcc CAM_CC_CSIPHY1_CLK>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&clock_camcc CAM_CC_CSIPHY2_CLK>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&clock_camcc CAM_CC_CSIPHY3_CLK>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>, + <&clock_camcc CAM_CC_CSIPHY4_CLK>, + <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_0_AXI_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK>, + <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_1_AXI_CLK>, + <&clock_camcc CAM_CC_IFE_1_CLK>, + <&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_2_AXI_CLK>, + <&clock_camcc CAM_CC_IFE_2_CLK>, + <&clock_camcc CAM_CC_IFE_2_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_0_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_0_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_1_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_1_CPHY_RX_CLK>; + + clock-names = "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csi3", + "csi4", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "csiphy3", + "csiphy3_timer", + "csiphy4", + "csiphy4_timer", + "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "vfe0_axi", + "vfe0", + "vfe0_cphy_rx", + "vfe1_axi", + "vfe1", + "vfe1_cphy_rx", + "vfe2_axi", + "vfe2", + "vfe2_cphy_rx", + "vfe0_lite", + "vfe0_lite_cphy_rx", + "vfe1_lite", + "vfe1_lite_cphy_rx"; + + interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_CAMERA_CFG 0>, + <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI1 0>; + interconnect-names = "ahb", "hf_0"; + + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + + interrupt-names = "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "csiphy4", + "vfe0", + "vfe1", + "vfe2", + "vfe_lite0", + "vfe_lite1"; + + iommus = <&apps_smmu 0x800 0x4e0>; + + power-domains = <&camcc CAM_CC_IFE_0_GDSC>, + <&camcc CAM_CC_IFE_1_GDSC>, + <&camcc CAM_CC_IFE_2_GDSC>, + <&camcc CAM_CC_TITAN_TOP_GDSC>; + power-domains-names = "ife0", "ife1", "ife2", "top"; + + reg = <0x0 0x0acb3000 0x0 0x1000>, + <0x0 0x0acba000 0x0 0x1000>, + <0x0 0x0acc1000 0x0 0x1000>, + <0x0 0x0acc8000 0x0 0x1000>, + <0x0 0x0accf000 0x0 0x1000>, + <0x0 0x0ace0000 0x0 0x2000>, + <0x0 0x0ace2000 0x0 0x2000>, + <0x0 0x0ace4000 0x0 0x2000>, + <0x0 0x0ace6000 0x0 0x2000>, + <0x0 0x0ace8000 0x0 0x2000>, + <0x0 0x0acaf000 0x0 0x4000>, + <0x0 0x0acb6000 0x0 0x4000>, + <0x0 0x0acbd000 0x0 0x4000>, + <0x0 0x0acc4000 0x0 0x4000>, + <0x0 0x0accb000 0x0 0x4000>; + + reg-names = "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "csiphy4", + "vfe0", + "vfe1", + "vfe2", + "vfe_lite0", + "vfe_lite1"; + + vdda-phy-supply = <&vreg_l10c_0p88>; + vdda-pll-supply = <&vreg_l6b_1p2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; From patchwork Wed Sep 4 11:10:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 103966 Received: from ny.mirrors.kernel.org ([147.75.199.223]) by linuxtv.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1slnwx-0006KN-0k for patchwork@linuxtv.org; Wed, 04 Sep 2024 11:13:24 +0000 Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 24B501C2208D for ; Wed, 4 Sep 2024 11:13:22 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5FDCB1D1F48; Wed, 4 Sep 2024 11:12:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="k4fel73E" X-Original-To: linux-media@vger.kernel.org Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C8451D1733; Wed, 4 Sep 2024 11:12:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448335; cv=none; b=JrWADPbano5iHK2IGA+e0RjPX0oPRTL4vzoRXpjx1Tl79jvRxgEJrw+DS+69qVp+N3H09SOey6eELTGCvKVc/yOydcrQG/OxAGa7aLAHGEppHPmAIFiAVK2pdTuOvH7cOH3LdRiKh5Li+CJ5lq2W2lidnyUsGUD5crhx6U7fmaw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448335; c=relaxed/simple; bh=TrdQZ87GF+cpzN/Dk5KoADPZXw52dsKzRF2LR+lKVxE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=dSz3nziC1dEMhaU6N9Bw4mGBq++wY7nbYam9JotZNhHWTQctHoSf3gYhjVUEWU2IG6NP/ecEqWbYVo9oxnnyOOf550DYWs9ixTnJOLnUcHg40tfiYE5vGqehVTDW7/wIMrYoFB7a86UgqafP9cnz+WoTCHKP8RW0zsamG6QFXCk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=k4fel73E; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4844YBLH010626; Wed, 4 Sep 2024 11:11:49 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= Ydj3+/Ij3Vjn6ILiAUcYBPDNnsQ2O7eY/4Dj7qGjaWw=; b=k4fel73ENkKlD29p uhIB6jaSxYpjNY0KNmTAfJXRz5xrqtc2/ZcnwG00CeGVfLeL5OrjCpX8YkCSQN37 uGVS86BR+paw4v673AfomuSYGL93nLo+QZvIHq7d+sTTULAyM5DTXmE7VGy7C7t/ OCjx9x4kxl7wLSKnYJUq/yCYK3pbtIWbKS3HkUCxPFWx3/yn+rRqrqtdVeWnLSWy zwMm98+6r8+fHkqLWGX0uZ3xUVhcjZld2av2qVSxmrC6yZOekkYHXFt12AO+1aTV mA2b7NgdDGlKciEosE0TNICEhMhGiXO0lXkABPjNlnA4SM/9RZ5HjgeD4b58Hnku 75cOIA== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41egmrgy2h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 11:11:49 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 484BBmjQ023857 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Sep 2024 11:11:48 GMT Received: from [169.254.0.1] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Sep 2024 04:11:42 -0700 From: Vikram Sharma Date: Wed, 4 Sep 2024 16:40:08 +0530 Subject: [PATCH 02/10] media: dt-bindings: media: qcs6490-rb3gen2-vision-mezzanine: Add dt bindings Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-2-b18ddcd7d9df@quicinc.com> References: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> In-Reply-To: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> To: Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kapatrala Syed , Hariram Purushothaman , "Bjorn Andersson" , Konrad Dybcio , Hans Verkuil , , Catalin Marinas , Will Deacon CC: , , , , , Vikram Sharma X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1725448289; l=748; i=quic_vikramsa@quicinc.com; s=20240628; h=from:subject:message-id; bh=TrdQZ87GF+cpzN/Dk5KoADPZXw52dsKzRF2LR+lKVxE=; b=W1Wk17lrjlnZ4T3ZSNuqMxW00A8A68P7Qj9TvQ7OST7dyzk8v9/gMY/pOWqJ9hTpp7ZRi/RKf /c6GSyThwGwD2ifAktGa8MVWRDKnv+sld3TX/LcM8wVZTYnNhvrLvgj X-Developer-Key: i=quic_vikramsa@quicinc.com; a=ed25519; pk=vQBkwZr1Hv+VXogAyTAu7AEx8/6bvkOmgrzYFbNGCDI= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: y48omhXVKSgOjTlBS2SoIZXEavJOhItS X-Proofpoint-ORIG-GUID: y48omhXVKSgOjTlBS2SoIZXEavJOhItS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_09,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 suspectscore=0 lowpriorityscore=0 mlxlogscore=973 priorityscore=1501 spamscore=0 malwarescore=0 adultscore=0 bulkscore=0 impostorscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040084 X-LSpam-Score: -6.3 (------) X-LSpam-Report: No, score=-6.3 required=5.0 tests=ARC_SIGNED=0.001,ARC_VALID=-0.1,BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,DMARC_PASS=-0.001,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_VALIDITY_CERTIFIED=-3,RCVD_IN_VALIDITY_RPBL=1.31,RCVD_IN_VALIDITY_SAFE=-2,SPF_HELO_NONE=0.001,SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no Add bindings for qcs6490-rb3gen2-vision-mezzanine. Signed-off-by: Vikram Sharma --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 5cb54d69af0b..b2261dcdfc2c 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -390,6 +390,7 @@ properties: - fairphone,fp5 - qcom,qcm6490-idp - qcom,qcs6490-rb3gen2 + - qcom,qcs6490-rb3gen2-vision-mezzanine - shift,otter - const: qcom,qcm6490 From patchwork Wed Sep 4 11:10:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 103964 Received: from ny.mirrors.kernel.org ([147.75.199.223]) by linuxtv.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1slnwO-0006De-2w for patchwork@linuxtv.org; Wed, 04 Sep 2024 11:12:49 +0000 Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id AF23F1C22005 for ; Wed, 4 Sep 2024 11:12:47 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5059D1D096C; Wed, 4 Sep 2024 11:12:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="Hxt8zByh" X-Original-To: linux-media@vger.kernel.org Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 769A91D04B3; Wed, 4 Sep 2024 11:12:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448326; cv=none; b=BD7Cu9PSO0A0kEfGR/TQOoaWPSE3/Q8lV1A02z+5sajiWRqKNrh0fNZ92nWVoGl4Ahe7h6upmbz3KwoXHkwypD+m6lx0lRKzZIwhLJEUSuOfACkl5fwJ10yOKdwLO+c8ZJIqwdO275yl8fT7klZZBb8MZL6HMd+6B6+zV4AOn2o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448326; c=relaxed/simple; bh=Qfo4SG04JA1avzMunJkHpOPgO4ke3s3rGLlQH1I3nyk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=m/6LDfSrB1tFNQmpD9BYF9LfZK027MbDUSEpD6ywL73/2yskEKI37O1/fPxmTrz6gw48mTBY53/HAVSp357XWeNUyjZXgrwRxyaNuqUzXxqR/Bk3Sk2jYL4b2/lYQo74/qr6KMgGN2wCLoWN950geJIsxxU+qE97bfpzZWSnOQc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=Hxt8zByh; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4849vUX6029938; Wed, 4 Sep 2024 11:11:55 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= tWlGfHBVtQOmxS9NVYbXksZ8cvR3jgjROa3dS+WJ5xU=; b=Hxt8zByhrPSmKOQc y6uLf2Rl5Z+brr32Rio8FzxbUZjsqR3UOvJf2d5jon00/HF4FgdQnT5VJDOiIeVk RzslXBfiyKHJdcSMzt1o8hIbpJbifFAaKFqlkme41di2/Zl6ueJ53gUca+JRcoYp d0c4LWxmB2487nh3K7ZIgwz6P+qewqz/GJGyxIZbSKLbh9zyvuaYRr+Y4CV0xyRL 7ohemALJoxFRMT6D0jYJ0oagTutwruR5wHE+CBvH/HZWBGWkJiLtsds6Op3W9iGm rE1y2NQKoBRdiCZB92rPASFzWo4z66jxwhkpAuLVCq0mghMNiNSKvQkrD8xSg11c 4D79dw== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41dxy23wt8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 11:11:55 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 484BBse5002289 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Sep 2024 11:11:54 GMT Received: from [169.254.0.1] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Sep 2024 04:11:48 -0700 From: Vikram Sharma Date: Wed, 4 Sep 2024 16:40:09 +0530 Subject: [PATCH 03/10] media: qcom: camss: Fix potential crash if domain attach fails Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-3-b18ddcd7d9df@quicinc.com> References: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> In-Reply-To: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> To: Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kapatrala Syed , Hariram Purushothaman , "Bjorn Andersson" , Konrad Dybcio , Hans Verkuil , , Catalin Marinas , Will Deacon CC: , , , , , Vikram Sharma , X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1725448289; l=1333; i=quic_vikramsa@quicinc.com; s=20240628; h=from:subject:message-id; bh=Qfo4SG04JA1avzMunJkHpOPgO4ke3s3rGLlQH1I3nyk=; b=wAtJvj1IJ4SSelejjIF4WasEAIO8cqACdGS3sGDSchgU6EypI00JHnGxqFlr+O5l/qCHCI6cq JiO2wdtPtc5AWq42hm0tBC/NBnYTPu5GcaGTBftF8OpQJwhyinmZAyI X-Developer-Key: i=quic_vikramsa@quicinc.com; a=ed25519; pk=vQBkwZr1Hv+VXogAyTAu7AEx8/6bvkOmgrzYFbNGCDI= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: cjBJNoG6w3gpnKxVfNv_GfhM86DHbszL X-Proofpoint-ORIG-GUID: cjBJNoG6w3gpnKxVfNv_GfhM86DHbszL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_09,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 impostorscore=0 bulkscore=0 priorityscore=1501 phishscore=0 suspectscore=0 lowpriorityscore=0 mlxlogscore=999 spamscore=0 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040084 X-LSpam-Score: -6.3 (------) X-LSpam-Report: No, score=-6.3 required=5.0 tests=ARC_SIGNED=0.001,ARC_VALID=-0.1,BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,DMARC_PASS=-0.001,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_VALIDITY_CERTIFIED=-3,RCVD_IN_VALIDITY_RPBL=1.31,RCVD_IN_VALIDITY_SAFE=-2,SPF_HELO_NONE=0.001,SPF_PASS=-0.001 autolearn=ham autolearn_force=no Fix a potential crash in camss by ensuring detach is skipped if attach is unsuccessful. Fixes: d89751c61279 ("media: qcom: camss: Add support for named power-domains") CC: stable@vger.kernel.org Signed-off-by: Vikram Sharma --- drivers/media/platform/qcom/camss/camss.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index d64985ca6e88..447b89d07e8a 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -2132,7 +2132,7 @@ static int camss_configure_pd(struct camss *camss) camss->res->pd_name); if (IS_ERR(camss->genpd)) { ret = PTR_ERR(camss->genpd); - goto fail_pm; + goto fail_pm_attach; } } @@ -2149,7 +2149,7 @@ static int camss_configure_pd(struct camss *camss) ret = -ENODEV; else ret = PTR_ERR(camss->genpd); - goto fail_pm; + goto fail_pm_attach; } camss->genpd_link = device_link_add(camss->dev, camss->genpd, DL_FLAG_STATELESS | DL_FLAG_PM_RUNTIME | @@ -2164,6 +2164,7 @@ static int camss_configure_pd(struct camss *camss) fail_pm: dev_pm_domain_detach(camss->genpd, true); +fail_pm_attach: return ret; } From patchwork Wed Sep 4 11:10:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 103965 Received: from ny.mirrors.kernel.org ([147.75.199.223]) by linuxtv.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1slnwi-0006EV-2v for patchwork@linuxtv.org; Wed, 04 Sep 2024 11:13:09 +0000 Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id A48851C2177C for ; Wed, 4 Sep 2024 11:13:07 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D39301D0DFB; Wed, 4 Sep 2024 11:12:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="jiBW/YDT" X-Original-To: linux-media@vger.kernel.org Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 136F51D0DCF; Wed, 4 Sep 2024 11:12:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448332; cv=none; b=N383JUQkR3STKBJC+dszynNa2+ZK23P3I5alVCURIbmkWlXhVLAtniajl/FrbJBpZwwu3jph4vz+04yFfqwznRU9sUBN/30UgXUtITdG1NzLzSfwXhObIZrpprSC0qZwMkhpNpMOMkJVCgi6FJXCF/1NG5+07U4SpQvEqOs+BJo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448332; c=relaxed/simple; bh=xmzDXgZPUN537+g/YhHI9iypRTvLmWXfZAoHLky93j4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=NKi+NK3macUXrAUwvFiLNNNquEgfuRG9GdeCzokPZR4cOiPexEOaruDL5eA9UbZL6eic3M3mg7l62h3UNqq8L9DneYOAdFG2pCt5H75XfqhZcffxGv1/qgKRU02YjTpia4fzZYdSuwB2ixzi6EeaIXYPADnrUvO7XlvvzmwBXZ4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=jiBW/YDT; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4849vUX7029938; Wed, 4 Sep 2024 11:12:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= LNDLOdPUOkXB8JGsqHkWwxgpIrxboA974W7HRUHPBxg=; b=jiBW/YDTuhUYP3Zz 1aI3iOv9F6+UaujWd6RgARAaYfJh032eGvvLZYDjm9KyZtiC3OJZQMYiDp+1mzci Fcee8+L7Idiq7rCxRBuGN2sRQomC92zGdCgEV180iajjoVKYSawuJRE4sVemw/j5 CQ6ndn75jMQtlEQyIfNh430MHf8xj5RySQAZKUR1GPkbtC5ybX7K2vCwmVWa4Ma7 QpFsehCCRAHM3WDcSuau9tFtxWZbYlUawAWVshrxwv+4pxOAD9LUybX/S5Tst8KG XtmTbo0xGWj2YBXR6jS7AR8DLnqXXlsVNiNAnj2vPHFltY+S8w+Er6wsNFnWRt6C vvt2Vg== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41dxy23wtf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 11:12:01 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 484BC1Rn029154 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Sep 2024 11:12:01 GMT Received: from [169.254.0.1] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Sep 2024 04:11:54 -0700 From: Vikram Sharma Date: Wed, 4 Sep 2024 16:40:10 +0530 Subject: [PATCH 04/10] media: qcom: camss: Sort CAMSS version enums and compatible strings Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-4-b18ddcd7d9df@quicinc.com> References: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> In-Reply-To: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> To: Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kapatrala Syed , Hariram Purushothaman , "Bjorn Andersson" , Konrad Dybcio , Hans Verkuil , , Catalin Marinas , Will Deacon CC: , , , , , Vikram Sharma , Suresh Vankadara , Trishansh Bhardwaj X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1725448289; l=3505; i=quic_vikramsa@quicinc.com; s=20240628; h=from:subject:message-id; bh=xmzDXgZPUN537+g/YhHI9iypRTvLmWXfZAoHLky93j4=; b=amgs0+rhhAl2Vxf78NBH/8+Up1YVSzX4QVcIwcqXxtxHarqjjxU7n5pJKpL8hJwqiNamWJkvT hWeVZleAMIqDaG2JWNmRDiu0tBMQM9mIAGKBL3g3G8fHgQLzYl+6yrC X-Developer-Key: i=quic_vikramsa@quicinc.com; a=ed25519; pk=vQBkwZr1Hv+VXogAyTAu7AEx8/6bvkOmgrzYFbNGCDI= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: wpmuW3wBiKtksR9sUea_WxbA3hF975kz X-Proofpoint-ORIG-GUID: wpmuW3wBiKtksR9sUea_WxbA3hF975kz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_09,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 impostorscore=0 bulkscore=0 priorityscore=1501 phishscore=0 suspectscore=0 lowpriorityscore=0 mlxlogscore=999 spamscore=0 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040084 X-LSpam-Score: -6.3 (------) X-LSpam-Report: No, score=-6.3 required=5.0 tests=ARC_SIGNED=0.001,ARC_VALID=-0.1,BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,DMARC_PASS=-0.001,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_VALIDITY_CERTIFIED=-3,RCVD_IN_VALIDITY_RPBL=1.31,RCVD_IN_VALIDITY_SAFE=-2,SPF_HELO_NONE=0.001,SPF_PASS=-0.001 autolearn=ham autolearn_force=no Sort CAMSS version enums and compatible strings alphanumerically. Signed-off-by: Suresh Vankadara Signed-off-by: Trishansh Bhardwaj Signed-off-by: Vikram Sharma Reviewed-by: Bryan O'Donoghue --- drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c | 10 +++++----- drivers/media/platform/qcom/camss/camss-vfe.c | 6 +++--- drivers/media/platform/qcom/camss/camss.c | 2 +- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index df7e93a5a4f6..7d2490c9de01 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -505,10 +505,6 @@ static void csiphy_gen2_config_lanes(struct csiphy_device *csiphy, u32 val; switch (csiphy->camss->res->version) { - case CAMSS_845: - r = &lane_regs_sdm845[0][0]; - array_size = ARRAY_SIZE(lane_regs_sdm845[0]); - break; case CAMSS_8250: r = &lane_regs_sm8250[0][0]; array_size = ARRAY_SIZE(lane_regs_sm8250[0]); @@ -517,6 +513,10 @@ static void csiphy_gen2_config_lanes(struct csiphy_device *csiphy, r = &lane_regs_sc8280xp[0][0]; array_size = ARRAY_SIZE(lane_regs_sc8280xp[0]); break; + case CAMSS_845: + r = &lane_regs_sdm845[0][0]; + array_size = ARRAY_SIZE(lane_regs_sdm845[0]); + break; default: WARN(1, "unknown cspi version\n"); return; @@ -557,9 +557,9 @@ static bool csiphy_is_gen2(u32 version) bool ret = false; switch (version) { - case CAMSS_845: case CAMSS_8250: case CAMSS_8280XP: + case CAMSS_845: ret = true; break; } diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index 83c5a36d071f..ffcb1e2ec417 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -333,11 +333,11 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code, return sink_code; } break; - case CAMSS_8x96: case CAMSS_660: - case CAMSS_845: + case CAMSS_8x96: case CAMSS_8250: case CAMSS_8280XP: + case CAMSS_845: switch (sink_code) { case MEDIA_BUS_FMT_YUYV8_1X16: { @@ -1692,9 +1692,9 @@ static int vfe_bpl_align(struct vfe_device *vfe) int ret = 8; switch (vfe->camss->res->version) { - case CAMSS_845: case CAMSS_8250: case CAMSS_8280XP: + case CAMSS_845: ret = 16; break; default: diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 447b89d07e8a..30b36d36f0b2 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -2448,10 +2448,10 @@ static const struct camss_resources sc8280xp_resources = { static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8916-camss", .data = &msm8916_resources }, { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources }, + { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources }, { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources }, { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources }, - { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources }, { } }; From patchwork Wed Sep 4 11:10:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 103967 Received: from sy.mirrors.kernel.org ([147.75.48.161]) by linuxtv.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1slnxK-0006Sl-1E for patchwork@linuxtv.org; Wed, 04 Sep 2024 11:13:48 +0000 Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id F0D8FB2662D for ; Wed, 4 Sep 2024 11:13:43 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 28A3E1D0179; Wed, 4 Sep 2024 11:12:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="H9RH/UmU" X-Original-To: linux-media@vger.kernel.org Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 13C9C1D014F; Wed, 4 Sep 2024 11:12:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448344; cv=none; b=g/eXgonM2yioRemthVEKu2ozuQZ/WDR/LFVyDU1gIqFzWcoTQC33pq+rd7+k7/u6d6q8EHqxvdWIRAtoKsC+EATUgN2qhvlQ0WfhZHmhgZEqnJBgeHWRAZ5cPlCK04Ffffk/2+8rXHyTPuqpos3tTf/R+1pjveAzCIqQnqNtOlY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448344; c=relaxed/simple; bh=jwLMfGORsSiP6mcpykXLayCwE51PJygqXblHzcDBQmE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=OWTF8jn09HJbt+HmIB1wDhM5QZ09eED0gNkyi8uK+7u6hebLmRSqS+jMsNC55L8jnwgd7dbEugzoO1V0JJFoEFAQnOXov6OAAwfw3gRTJDEFCKbKxyKmXHxHryCptuqIIR4+YZqxoT3+2NaI7LsOMXEWcJB4TbMb8vTkxd8cl+E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=H9RH/UmU; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 484AP5St020460; Wed, 4 Sep 2024 11:12:08 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= QTC79PgSwR1fcyw/55Y1ZQEVyYMHWVicGE4iKZ9HLX0=; b=H9RH/UmUNgfQWWiE w5Wggxy4J6ggwHYSyYtpVUWN1ZWRqJwVjM3VYro5DMGgwP7iArTcUbKhL6xmJuEo mstgHWNVsm21MajabB7tOC9dYErFx1MTAwJFEFWpburBwpCdhKr+XJuNBne1Ortt KybRLJCxFYzkYuggcNg99mYsdS2lFT9m1+irc2XOaCwXgqT9m4OxgWaur4Y02imi 7HikSGbLzcn09TYb/r2CSAwXaQ/fvD8VAa+OeFI0cCMgQ8g7x1N9MqGAVTh2m7wM 2CeYNFJ8Kgrn0NV2+pcOhiw9W6lfBWclSROkZQtCbP+MA7AjPX4Z7H8M9buOJ65T 6iW2dw== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41buxfabgy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 11:12:08 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 484BC7mY030641 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Sep 2024 11:12:07 GMT Received: from [169.254.0.1] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Sep 2024 04:12:01 -0700 From: Vikram Sharma Date: Wed, 4 Sep 2024 16:40:11 +0530 Subject: [PATCH 05/10] media: qcom: camss: Add support for camss driver on SC7280 Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-5-b18ddcd7d9df@quicinc.com> References: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> In-Reply-To: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> To: Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kapatrala Syed , Hariram Purushothaman , "Bjorn Andersson" , Konrad Dybcio , Hans Verkuil , , Catalin Marinas , Will Deacon CC: , , , , , Vikram Sharma , Suresh Vankadara , Trishansh Bhardwaj X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1725448289; l=14035; i=quic_vikramsa@quicinc.com; s=20240628; h=from:subject:message-id; bh=afVmOOOoXXeG91gjgMgKd+TU0g/ecGjCrjBDkYgcPCU=; b=K9DnhxexXgAbscpk19hG615WiwTHc7oqSiSnG23N16raAhlDZ2x/izre4CpRcMlCdQ1A2Wspq x+lWY4quJoFDeOmNacEaaIbWatOTz7WjTKgxtxaWNRLR3NGmh1MjSEl X-Developer-Key: i=quic_vikramsa@quicinc.com; a=ed25519; pk=vQBkwZr1Hv+VXogAyTAu7AEx8/6bvkOmgrzYFbNGCDI= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: sFLk0lzhVSfNl3M81r9ZjHTw7Bv8Uqux X-Proofpoint-ORIG-GUID: sFLk0lzhVSfNl3M81r9ZjHTw7Bv8Uqux X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_09,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 adultscore=0 clxscore=1015 mlxlogscore=999 lowpriorityscore=0 phishscore=0 bulkscore=0 mlxscore=0 impostorscore=0 priorityscore=1501 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040084 X-LSpam-Score: -6.3 (------) X-LSpam-Report: No, score=-6.3 required=5.0 tests=ARC_SIGNED=0.001,ARC_VALID=-0.1,BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,DMARC_PASS=-0.001,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_VALIDITY_CERTIFIED=-3,RCVD_IN_VALIDITY_RPBL=1.31,RCVD_IN_VALIDITY_SAFE=-2,SPF_HELO_NONE=0.001,SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no From: Suresh Vankadara Add support for the camss driver on the SC7280 SoC. Signed-off-by: Suresh Vankadara Signed-off-by: Trishansh Bhardwaj Signed-off-by: Vikram Sharma --- drivers/media/platform/qcom/camss/camss-csid.c | 1 - .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 5 + drivers/media/platform/qcom/camss/camss-csiphy.c | 5 + drivers/media/platform/qcom/camss/camss-csiphy.h | 1 + drivers/media/platform/qcom/camss/camss-vfe.c | 2 + drivers/media/platform/qcom/camss/camss.c | 342 +++++++++++++++++++++ drivers/media/platform/qcom/camss/camss.h | 1 + 7 files changed, 356 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c index 858db5d4ca75..8d3dc26e2af4 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c @@ -1028,7 +1028,6 @@ int msm_csid_subdev_init(struct camss *camss, struct csid_device *csid, csid->res->hw_ops->subdev_init(csid); /* Memory */ - if (camss->res->version == CAMSS_8250) { /* for titan 480, CSID registers are inside the VFE region, * between the VFE "top" and "bus" registers. this requires diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index 7d2490c9de01..f341f7b7fd8a 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -505,6 +505,10 @@ static void csiphy_gen2_config_lanes(struct csiphy_device *csiphy, u32 val; switch (csiphy->camss->res->version) { + case CAMSS_7280: + r = &lane_regs_sm8250[0][0]; + array_size = ARRAY_SIZE(lane_regs_sm8250[0]); + break; case CAMSS_8250: r = &lane_regs_sm8250[0][0]; array_size = ARRAY_SIZE(lane_regs_sm8250[0]); @@ -557,6 +561,7 @@ static bool csiphy_is_gen2(u32 version) bool ret = false; switch (version) { + case CAMSS_7280: case CAMSS_8250: case CAMSS_8280XP: case CAMSS_845: diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c index 2f7361dfd461..b3525ad81ffd 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c @@ -108,6 +108,11 @@ const struct csiphy_formats csiphy_formats_sdm845 = { .formats = formats_sdm845 }; +const struct csiphy_formats csiphy_formats_sc7280 = { + .nformats = ARRAY_SIZE(formats_sdm845), + .formats = formats_sdm845 +}; + /* * csiphy_get_bpp - map media bus format to bits per pixel * @formats: supported media bus formats array diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.h b/drivers/media/platform/qcom/camss/camss-csiphy.h index 47f0b6b09eba..9295f2fc6745 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.h +++ b/drivers/media/platform/qcom/camss/camss-csiphy.h @@ -110,6 +110,7 @@ void msm_csiphy_unregister_entity(struct csiphy_device *csiphy); extern const struct csiphy_formats csiphy_formats_8x16; extern const struct csiphy_formats csiphy_formats_8x96; extern const struct csiphy_formats csiphy_formats_sdm845; +extern const struct csiphy_formats csiphy_formats_sc7280; extern const struct csiphy_hw_ops csiphy_ops_2ph_1_0; extern const struct csiphy_hw_ops csiphy_ops_3ph_1_0; diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index ffcb1e2ec417..61f6815a3756 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -334,6 +334,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code, } break; case CAMSS_660: + case CAMSS_7280: case CAMSS_8x96: case CAMSS_8250: case CAMSS_8280XP: @@ -1692,6 +1693,7 @@ static int vfe_bpl_align(struct vfe_device *vfe) int ret = 8; switch (vfe->camss->res->version) { + case CAMSS_7280: case CAMSS_8250: case CAMSS_8280XP: case CAMSS_845: diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 30b36d36f0b2..5e7235001239 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -1480,6 +1480,333 @@ static const struct resources_icc icc_res_sc8280xp[] = { }, }; +static const struct camss_subdev_resources csiphy_res_7280[] = { + /* CSIPHY0 */ + { + .regulators = {}, + .clock = { "csiphy0", "csiphy0_timer"}, + .clock_rate = { + { 300000000 }, + { 300000000 } + }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sc7280 + } + }, + /* CSIPHY1 */ + { + .regulators = {}, + .clock = { "csiphy1", "csiphy1_timer"}, + .clock_rate = { + { 300000000 }, + { 300000000 } + }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sc7280 + } + }, + /* CSIPHY2 */ + { + .regulators = {}, + .clock = { "csiphy2", "csiphy2_timer"}, + .clock_rate = { + { 300000000 }, + { 300000000 } + }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sc7280 + } + }, + /* CSIPHY3 */ + { + .regulators = {}, + .clock = { "csiphy3", "csiphy3_timer"}, + .clock_rate = { + { 300000000 }, + { 300000000 } + }, + .reg = { "csiphy3" }, + .interrupt = { "csiphy3" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sc7280 + } + }, + /* CSIPHY4 */ + { + .regulators = {}, + .clock = { "csiphy4", "csiphy4_timer"}, + .clock_rate = { + { 300000000 }, + { 300000000 } + }, + .reg = { "csiphy4" }, + .interrupt = { "csiphy4" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sc7280 + } + }, +}; + +static const struct camss_subdev_resources csid_res_7280[] = { + /* CSID0 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + + .clock = { "csi0", "vfe0_cphy_rx", "vfe0", "soc_ahb"}, + .clock_rate = { + { 300000000, 0, 380000000, 0}, + { 400000000, 0, 510000000, 0}, + { 400000000, 0, 637000000, 0}, + { 400000000, 0, 760000000, 0} + }, + + .reg = { "csid0" }, + .interrupt = { "csid0" }, + .csid = { + .is_lite = false, + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + /* CSID1 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + + .clock = { "csi1", "vfe1_cphy_rx", "vfe1", "soc_ahb"}, + .clock_rate = { + { 300000000, 0, 380000000, 0}, + { 400000000, 0, 510000000, 0}, + { 400000000, 0, 637000000, 0}, + { 400000000, 0, 760000000, 0} + }, + + .reg = { "csid1" }, + .interrupt = { "csid1" }, + .csid = { + .is_lite = false, + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + /* CSID2 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + + .clock = { "csi2", "vfe2_cphy_rx", "vfe2", "soc_ahb"}, + .clock_rate = { + { 300000000, 0, 380000000, 0}, + { 400000000, 0, 510000000, 0}, + { 400000000, 0, 637000000, 0}, + { 400000000, 0, 760000000, 0} + }, + + .reg = { "csid2" }, + .interrupt = { "csid2" }, + .csid = { + .is_lite = false, + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + /* CSID3 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + + .clock = { "csi3", "vfe0_lite_cphy_rx", "vfe0_lite", "soc_ahb"}, + .clock_rate = { + { 300000000, 0, 320000000, 0}, + { 400000000, 0, 400000000, 0}, + { 400000000, 0, 480000000, 0}, + { 400000000, 0, 600000000, 0} + }, + + .reg = { "csid_lite0" }, + .interrupt = { "csid_lite0" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + /* CSID4 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + + .clock = { "csi3", "vfe0_lite_cphy_rx", "vfe0_lite", "soc_ahb"}, + .clock_rate = { + { 300000000, 0, 320000000, 0}, + { 400000000, 0, 400000000, 0}, + { 400000000, 0, 480000000, 0}, + { 400000000, 0, 600000000, 0} + }, + + .reg = { "csid_lite1" }, + .interrupt = { "csid_lite1" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, +}; + +static const struct camss_subdev_resources vfe_res_7280[] = { + /* VFE0 */ + { + .regulators = {}, + + .clock = { "vfe0", "vfe0_axi", "soc_ahb", + "cpas_ahb", "camnoc_axi", + "gcc_camera_axi"}, + .clock_rate = { + { 380000000, 0, 80000000, 0, 150000000, 0}, + { 510000000, 0, 80000000, 0, 240000000, 0}, + { 637000000, 0, 80000000, 0, 320000000, 0}, + { 760000000, 0, 80000000, 0, 400000000, 0}, + { 760000000, 0, 80000000, 0, 480000000, 0}, + }, + + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .vfe = { + .line_num = 3, + .is_lite = false, + .has_pd = true, + .pd_name = "ife0", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + /* VFE1 */ + { + .regulators = {}, + + .clock = { "vfe1", "vfe1_axi", "soc_ahb", + "cpas_ahb", "camnoc_axi", + "gcc_camera_axi"}, + .clock_rate = { + { 380000000, 0, 80000000, 0, 150000000, 0}, + { 510000000, 0, 80000000, 0, 240000000, 0}, + { 637000000, 0, 80000000, 0, 320000000, 0}, + { 760000000, 0, 80000000, 0, 400000000, 0}, + { 760000000, 0, 80000000, 0, 480000000, 0}, + }, + + .reg = { "vfe1" }, + .interrupt = { "vfe1" }, + .vfe = { + .line_num = 3, + .is_lite = false, + .has_pd = true, + .pd_name = "ife1", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + /* VFE2 */ + { + .regulators = {}, + + .clock = { "vfe2", "vfe2_axi", "soc_ahb", + "cpas_ahb", "camnoc_axi", + "gcc_camera_axi"}, + .clock_rate = { + { 380000000, 0, 80000000, 0, 150000000, 0}, + { 510000000, 0, 80000000, 0, 240000000, 0}, + { 637000000, 0, 80000000, 0, 320000000, 0}, + { 760000000, 0, 80000000, 0, 400000000, 0}, + { 760000000, 0, 80000000, 0, 480000000, 0}, + }, + + .reg = { "vfe2" }, + .interrupt = { "vfe2" }, + .vfe = { + .line_num = 3, + .is_lite = false, + .hw_ops = &vfe_ops_170, + .has_pd = true, + .pd_name = "ife2", + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + /* VFE3 (lite) */ + { + .clock = { "vfe0_lite", "soc_ahb", "cpas_ahb", + "camnoc_axi", "gcc_camera_axi"}, + .clock_rate = { + { 320000000, 80000000, 0, 150000000, 0}, + { 400000000, 80000000, 0, 240000000, 0}, + { 480000000, 80000000, 0, 320000000, 0}, + { 600000000, 80000000, 0, 400000000, 0}, + }, + + .regulators = {}, + .reg = { "vfe_lite0" }, + .interrupt = { "vfe_lite0" }, + .vfe = { + .line_num = 4, + .is_lite = true, + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + /* VFE4 (lite) */ + { + .clock = { "vfe1_lite", "soc_ahb", "cpas_ahb", + "camnoc_axi", "gcc_camera_axi"}, + .clock_rate = { + { 320000000, 80000000, 0, 150000000, 0}, + { 400000000, 80000000, 0, 240000000, 0}, + { 480000000, 80000000, 0, 320000000, 0}, + { 600000000, 80000000, 0, 400000000, 0}, + }, + + .regulators = {}, + .reg = { "vfe_lite1" }, + .interrupt = { "vfe_lite1" }, + .vfe = { + .line_num = 4, + .is_lite = true, + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, +}; + +static const struct resources_icc icc_res_sc7280[] = { + { + .name = "ahb", + .icc_bw_tbl.avg = 38400, + .icc_bw_tbl.peak = 76800, + }, + { + .name = "hf_0", + .icc_bw_tbl.avg = 2097152, + .icc_bw_tbl.peak = 2097152, + }, +}; + /* * camss_add_clock_margin - Add margin to clock frequency rate * @rate: Clock frequency rate @@ -2445,9 +2772,24 @@ static const struct camss_resources sc8280xp_resources = { .link_entities = camss_link_entities }; +static const struct camss_resources sc7280_resources = { + .version = CAMSS_7280, + .pd_name = "top", + .csiphy_res = csiphy_res_7280, + .csid_res = csid_res_7280, + .vfe_res = vfe_res_7280, + .icc_res = icc_res_sc7280, + .icc_path_num = ARRAY_SIZE(icc_res_sc7280), + .csiphy_num = ARRAY_SIZE(csiphy_res_7280), + .csid_num = ARRAY_SIZE(csid_res_7280), + .vfe_num = ARRAY_SIZE(vfe_res_7280), + .link_entities = camss_link_entities +}; + static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8916-camss", .data = &msm8916_resources }, { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources }, + { .compatible = "qcom,sc7280-camss", .data = &sc7280_resources }, { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources }, { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources }, { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index 73c47c07fc30..16e527f8b831 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -76,6 +76,7 @@ enum camss_version { CAMSS_8x16, CAMSS_8x96, CAMSS_660, + CAMSS_7280, CAMSS_845, CAMSS_8250, CAMSS_8280XP, From patchwork Wed Sep 4 11:10:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 103969 Received: from sy.mirrors.kernel.org ([147.75.48.161]) by linuxtv.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1slnxp-0006eU-1L for patchwork@linuxtv.org; Wed, 04 Sep 2024 11:14:20 +0000 Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 1F41AB26D2B for ; Wed, 4 Sep 2024 11:14:15 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 17E751D415B; Wed, 4 Sep 2024 11:12:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="gmls/LGz" X-Original-To: linux-media@vger.kernel.org Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F82F1D016C; Wed, 4 Sep 2024 11:12:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448354; cv=none; b=sBCPSeLv2bpdLFOtDL2XTJPq9RH8hEmuGTo/UbeVPTmdQzMd8sFKxepwx5fPf50CmwWxLQCtcfJj94g3gDs7eNFWRm47zSGr5+XoQ9mbdgrGUz6oepVbgnKQVjp3nvqTkBMEUOCkZrTzds1IPsW/SD0M8JYB19x64Ly0GenVc1A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448354; c=relaxed/simple; bh=Kcp2kWdP+HNWbKqjmmtJA1KBNWiD20CxJPBdj/Q6yBo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=muVkKU+1Dts3bifzoFjIjk8JkS+UBwfqkEy09TYVyeJgZuk1SdIs5nu1Cz/wre4jnBVeK7EjCG8D2lc4hJhwHcF1D08o6EtdQgMa5uRBCUQEmB7yvf0s+S3z29OeyC7iPYaL/JVO6xiV+4k5+ak+9CbVQTHXmAUzZ3C0CM7k5ok= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=gmls/LGz; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 484A1b30001041; Wed, 4 Sep 2024 11:12:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= zrLAh74DYFhvMtwKfP+Vk1B+Ukjx+HUK386pS2ziaA4=; b=gmls/LGz+Gv2cpc1 IfspzQqFETYcj89L9IZ12oTza7NnMAI961D4joDoh9glSVV5oy2SNwoB61zPwi+1 jRm0FR71RiwCSVJibfBYmchCBhwyNMl0i4j7wdTg7CQA1X3Jj2czg5zDWwJvEFDJ 0Utq7PL4sbiTmTYkUCxmceUrRiwn2X2J0UEQ4EVVpJK3+qHxJP3k/hRP5nvvUH2T B4oDm4naoz3tWJd+ewfJQkMlBxrya3ptbu2BdWMpIp6dHY6Z+bJk4oEBRE1p/VUH oCSKd7sk8G1vmwtG7N4S3cWOcE3+gBl8rIl9tBWKz/JH+nOnEBGlVGySIhNbywLO IeGssw== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41drqe4t0e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 11:12:15 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 484BCDGe030749 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Sep 2024 11:12:13 GMT Received: from [169.254.0.1] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Sep 2024 04:12:07 -0700 From: Vikram Sharma Date: Wed, 4 Sep 2024 16:40:12 +0530 Subject: [PATCH 06/10] media: qcom: camss: Add camss_link_entities_v2 Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-6-b18ddcd7d9df@quicinc.com> References: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> In-Reply-To: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> To: Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kapatrala Syed , Hariram Purushothaman , "Bjorn Andersson" , Konrad Dybcio , Hans Verkuil , , Catalin Marinas , Will Deacon CC: , , , , , Vikram Sharma , Suresh Vankadara , Trishansh Bhardwaj X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1725448289; l=2731; i=quic_vikramsa@quicinc.com; s=20240628; h=from:subject:message-id; bh=Kcp2kWdP+HNWbKqjmmtJA1KBNWiD20CxJPBdj/Q6yBo=; b=al04Z44xl/mD5WvI/+Adn6dxipaTdlSF0P/YK/L1JRrbsxLWYBS+XBnFzoXTxFcoxCxk2gRlH m1ruQorThyRDCrJRjjbnzaci7EIpEQ/QlE2DpWbRM3FQz+FCBDHn01g X-Developer-Key: i=quic_vikramsa@quicinc.com; a=ed25519; pk=vQBkwZr1Hv+VXogAyTAu7AEx8/6bvkOmgrzYFbNGCDI= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: g8Ew9EuCdgjlSPMOUzuaIx_G6yK7WyOv X-Proofpoint-ORIG-GUID: g8Ew9EuCdgjlSPMOUzuaIx_G6yK7WyOv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_09,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxscore=0 phishscore=0 adultscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 spamscore=0 mlxlogscore=848 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040084 X-LSpam-Score: -6.3 (------) X-LSpam-Report: No, score=-6.3 required=5.0 tests=ARC_SIGNED=0.001,ARC_VALID=-0.1,BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,DMARC_PASS=-0.001,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_VALIDITY_CERTIFIED=-3,RCVD_IN_VALIDITY_RPBL=1.31,RCVD_IN_VALIDITY_SAFE=-2,SPF_HELO_NONE=0.001,SPF_PASS=-0.001 autolearn=ham autolearn_force=no Add camss_link_entities_v2, derived from the camss_link_entities function, to handle linking for targets without ISPIF. camss_link_entities -> Targets with ispif. camss_link_entities_v2 -> Targets without ispif. Signed-off-by: Suresh Vankadara Signed-off-by: Trishansh Bhardwaj Signed-off-by: Vikram Sharma --- drivers/media/platform/qcom/camss/camss.c | 53 ++++++++++++++++++++++++++++++- 1 file changed, 52 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 5e7235001239..516434686a27 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -2154,6 +2154,57 @@ static int camss_init_subdevices(struct camss *camss) return 0; } +/* + * camss_link_entities_v2 - Register subdev nodes and create links + * @camss: CAMSS device + * + * Return 0 on success or a negative error code on failure + */ +static int camss_link_entities_v2(struct camss *camss) +{ + int i, j; + int ret; + + for (i = 0; i < camss->res->csiphy_num; i++) { + for (j = 0; j < camss->res->csid_num; j++) { + ret = media_create_pad_link(&camss->csiphy[i].subdev.entity, + MSM_CSIPHY_PAD_SRC, + &camss->csid[j].subdev.entity, + MSM_CSID_PAD_SINK, + 0); + if (ret < 0) { + dev_err(camss->dev, + "Failed to link %s->%s entities: %d\n", + camss->csiphy[i].subdev.entity.name, + camss->csid[j].subdev.entity.name, + ret); + return ret; + } + } + } + + for (i = 0; i < camss->res->csid_num; i++) + for (j = 0; j < camss->vfe[i].res->line_num; j++) { + struct v4l2_subdev *csid = &camss->csid[i].subdev; + struct v4l2_subdev *vfe = &camss->vfe[i].line[j].subdev; + + ret = media_create_pad_link(&csid->entity, + MSM_CSID_PAD_FIRST_SRC + j, + &vfe->entity, + MSM_VFE_PAD_SINK, + 0); + if (ret < 0) { + dev_err(camss->dev, + "Failed to link %s->%s entities: %d\n", + csid->entity.name, + vfe->entity.name, + ret); + return ret; + } + } + return 0; +} + /* * camss_link_entities - Register subdev nodes and create links * @camss: CAMSS device @@ -2769,7 +2820,7 @@ static const struct camss_resources sc8280xp_resources = { .csiphy_num = ARRAY_SIZE(csiphy_res_sc8280xp), .csid_num = ARRAY_SIZE(csid_res_sc8280xp), .vfe_num = ARRAY_SIZE(vfe_res_sc8280xp), - .link_entities = camss_link_entities + .link_entities = camss_link_entities_v2 }; static const struct camss_resources sc7280_resources = { From patchwork Wed Sep 4 11:10:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 103968 Received: from sy.mirrors.kernel.org ([147.75.48.161]) by linuxtv.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1slnxe-0006aZ-1u for patchwork@linuxtv.org; Wed, 04 Sep 2024 11:14:07 +0000 Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id DA740B26771 for ; Wed, 4 Sep 2024 11:14:03 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9744A1D222D; Wed, 4 Sep 2024 11:12:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="iv+3/nNA" X-Original-To: linux-media@vger.kernel.org Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF2021D014F; Wed, 4 Sep 2024 11:12:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448353; cv=none; b=TuQ2s4h7craNUI1s2EW+Pn5qxrmHn2xC7RjYSaQcS/r7MyMRvkMCg4JLO0kvqaw8tNzmNMeVkfdJ+3DyZAgmv5LZXmLdfWcQLyrdc5hjjjuHO+lIgUS6ts8C0zMstiXWmz0Vxl36gS2w1Enad/NdFeoiL30trb0DTVCsMv8Ml9U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448353; c=relaxed/simple; bh=TDiCjwXaBQKG1nsRyTHoyOzWVuzEAID1JICUMDQO3Ls=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=lFmKTwwMKtwpSldFI7nJjd7gny81IE6bHj59CZIQafSzISVyOCNl7ZDZA7bQtsGQHYfHvqUAB3GQ9GOgloDf2Ar80XxhPglKVx7f5MXhjK8QtzadJV8jJEJ2hoNAIcXdvoxKSzkBn6lgIBxDLX0wz1EyTu9ZmmHpH5hK59GU6F0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=iv+3/nNA; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 484ANHJJ000699; Wed, 4 Sep 2024 11:12:21 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= N/5ylamGMllBmEt3bOnxKkvgJejhp8nE5+PCYAYsIPM=; b=iv+3/nNAxP8d7Kvf 1Que1vRVqmTBsfIxCQc81tZjQnoUeVYMBPkrAUSlKnKI0PkWnq5a9WCIwviAEKct AikIqlA0bJZkYQfau0C39vH9LQjjmOZp+XFizGPfOqhCfT6FVpJ2uD1/u1tCmVnn rnEGUqtKKgYPQCXXfCk5aqETqOIGz4VvTAillBIHFsxgLIoKIdsNzpU0LTOmXC2p asdkKG4A5q1cvvLcyaR7WiPx093QWSNDVJIIjha7iz488Cl/IR/z5Bb674hJ1aXk rcFEXDAwQWQLSTtmw+sRrdgCgVJExvPZa6GTOS7ytGqmv9MfzrsZKqGJP8UW2ZXg 1LJUNw== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41drqe4t0n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 11:12:21 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 484BCKt7011759 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Sep 2024 11:12:20 GMT Received: from [169.254.0.1] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Sep 2024 04:12:13 -0700 From: Vikram Sharma Date: Wed, 4 Sep 2024 16:40:13 +0530 Subject: [PATCH 07/10] arm64: dts: qcom: sc7280: Add support for camss Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-7-b18ddcd7d9df@quicinc.com> References: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> In-Reply-To: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> To: Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kapatrala Syed , Hariram Purushothaman , "Bjorn Andersson" , Konrad Dybcio , Hans Verkuil , , Catalin Marinas , Will Deacon CC: , , , , , Vikram Sharma , Suresh Vankadara , Trishansh Bhardwaj X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1725448289; l=5258; i=quic_vikramsa@quicinc.com; s=20240628; h=from:subject:message-id; bh=TDiCjwXaBQKG1nsRyTHoyOzWVuzEAID1JICUMDQO3Ls=; b=xJmXYqO4a8ogbKx+Xi+4xhzmER3TU92TUWpFAJeP/pOSDob8sYaeiXzwz7aYHFzGtZ5sn+vNl 4qIoTyyFFXPAedcMfc49AW3vZeGJgyQJLelyOWU50xNK97E0NW3onty X-Developer-Key: i=quic_vikramsa@quicinc.com; a=ed25519; pk=vQBkwZr1Hv+VXogAyTAu7AEx8/6bvkOmgrzYFbNGCDI= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: IEX_5uY_ABjQCGpLq0L-TzVoZQbHSdwc X-Proofpoint-ORIG-GUID: IEX_5uY_ABjQCGpLq0L-TzVoZQbHSdwc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_09,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxscore=0 phishscore=0 adultscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 spamscore=0 mlxlogscore=946 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040084 X-LSpam-Score: -6.3 (------) X-LSpam-Report: No, score=-6.3 required=5.0 tests=ARC_SIGNED=0.001,ARC_VALID=-0.1,BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,DMARC_PASS=-0.001,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_VALIDITY_CERTIFIED=-3,RCVD_IN_VALIDITY_RPBL=1.31,RCVD_IN_VALIDITY_SAFE=-2,SPF_HELO_NONE=0.001,SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no Add changes to support the camera subsystem on the SC7280. Signed-off-by: Suresh Vankadara Signed-off-by: Trishansh Bhardwaj Signed-off-by: Vikram Sharma --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 175 +++++++++++++++++++++++++++++++++++ 1 file changed, 175 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 3d8410683402..109aafe967f8 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -4419,6 +4419,181 @@ cci1_i2c1: i2c-bus@1 { }; }; + camss: camss@acaf000 { + compatible = "qcom,sc7280-camss"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_2_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_1_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY3_CLK>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY4_CLK>, + <&camcc CAM_CC_CSI4PHYTIMER_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_2_AXI_CLK>, + <&camcc CAM_CC_IFE_2_CLK>, + <&camcc CAM_CC_IFE_2_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_0_CLK>, + <&camcc CAM_CC_IFE_LITE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_1_CLK>, + <&camcc CAM_CC_IFE_LITE_1_CPHY_RX_CLK>; + + clock-names = "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csi3", + "csi4", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "csiphy3", + "csiphy3_timer", + "csiphy4", + "csiphy4_timer", + "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "vfe0_axi", + "vfe0", + "vfe0_cphy_rx", + "vfe1_axi", + "vfe1", + "vfe1_cphy_rx", + "vfe2_axi", + "vfe2", + "vfe2_cphy_rx", + "vfe0_lite", + "vfe0_lite_cphy_rx", + "vfe1_lite", + "vfe1_lite_cphy_rx"; + + interconnect-names = "ahb", "hf_0"; + interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_CAMERA_CFG 0>, + <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI1 0>; + + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + + interrupt-names = "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "csiphy4", + "vfe0", + "vfe1", + "vfe2", + "vfe_lite0", + "vfe_lite1"; + + iommus = <&apps_smmu 0x800 0x4e0>; + + power-domains = <&camcc CAM_CC_IFE_0_GDSC>, + <&camcc CAM_CC_IFE_1_GDSC>, + <&camcc CAM_CC_IFE_2_GDSC>, + <&camcc CAM_CC_TITAN_TOP_GDSC>; + power-domains-names = "ife0", "ife1", "ife2", "top"; + + reg = <0x0 0x0acb3000 0x0 0x1000>, + <0x0 0x0acba000 0x0 0x1000>, + <0x0 0x0acc1000 0x0 0x1000>, + <0x0 0x0acc8000 0x0 0x1000>, + <0x0 0x0accf000 0x0 0x1000>, + <0x0 0x0ace0000 0x0 0x2000>, + <0x0 0x0ace2000 0x0 0x2000>, + <0x0 0x0ace4000 0x0 0x2000>, + <0x0 0x0ace6000 0x0 0x2000>, + <0x0 0x0ace8000 0x0 0x2000>, + <0x0 0x0acaf000 0x0 0x4000>, + <0x0 0x0acb6000 0x0 0x4000>, + <0x0 0x0acbd000 0x0 0x4000>, + <0x0 0x0acc4000 0x0 0x4000>, + <0x0 0x0accb000 0x0 0x4000>; + + reg-names = "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "csiphy4", + "vfe0", + "vfe1", + "vfe2", + "vfe_lite0", + "vfe_lite1"; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + }; + + port@2 { + reg = <2>; + }; + + port@3 { + reg = <3>; + }; + + port@4 { + reg = <4>; + }; + }; + }; + camcc: clock-controller@ad00000 { compatible = "qcom,sc7280-camcc"; reg = <0 0x0ad00000 0 0x10000>; From patchwork Wed Sep 4 11:10:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 103970 Received: from sy.mirrors.kernel.org ([147.75.48.161]) by linuxtv.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1slnyG-0006q0-11 for patchwork@linuxtv.org; Wed, 04 Sep 2024 11:14:44 +0000 Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id A68F9B26FC9 for ; Wed, 4 Sep 2024 11:14:41 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8F3EB126C01; Wed, 4 Sep 2024 11:12:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="B2vVGHR7" X-Original-To: linux-media@vger.kernel.org Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C1C821D014F; Wed, 4 Sep 2024 11:12:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448361; cv=none; b=L4a4AEu/f/k55w6DQR7OUQMuDmHqWDOHwaSYEE4GagFqSrfGTORlKlyKZQ9WiiDXsJ4Wcj1Q0TFsvRcs7uGApaclFJ6WcPQ57xkN/NnjizioqgKOQOBY4RwDNZyJj+aYM+gheC250KjrKYEL01Cb1KJrN76G4FcHw6+5QZi4hHg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448361; c=relaxed/simple; bh=3o55IMd7Rd92JBDtHfXiJsTPuh3E7dt5jNiMWieXmWc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=T9Oe73pTDQj6FyXYBKzld9aYGaWdqUheaqrynX6IuSdVbINwaqbqC88yUDdxh7z5gjC8EzIl7jJbY3YDxuiio5ZaspLbd4e3tWVHrhegNB3a5YeCcEF/mOfrGhKmifwQgp6wFj1h7osizPpqJX+qdBSgQAcD2YbTQRdWBZnyj4o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=B2vVGHR7; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4848KXHQ009495; Wed, 4 Sep 2024 11:12:28 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= kerS2jZYFfI+XEm5sc+JhUzfmntgFp7rZ77qb/uhnPE=; b=B2vVGHR7oYG0Ioqk z6+UodmMG0D9Mup6KCA6+aaYGGCQWxPEYdSWmRRpqqnghSoVdKT/cP3It1GKP7ig 4pRPDIcwPjOrZSSF29ajX4Z4lqU/Bxp80/M+xQdNkL/Si08NKYrXLPAqUmawAUjE ZTbKu0a20NIiQGMjx08JU453gcLKTiRS6kzN2OIoVRJjBZsFwuBTTOK7IkzCZjkY b58eqtGJjVdFXpVRb73bLbVz8+vY242PbWQ+Dw9uEF2o6Pi49nOQ1yfaAykVLtGZ DRKOPCxVmOEvy3H2NlY6pmotdMI6v2cVYH1BO7hsFXdqGyQnais5f/fxJY56NWw1 8L9wFA== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41e0bhkqt4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 11:12:27 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 484BCQOn003373 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Sep 2024 11:12:26 GMT Received: from [169.254.0.1] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Sep 2024 04:12:20 -0700 From: Vikram Sharma Date: Wed, 4 Sep 2024 16:40:14 +0530 Subject: [PATCH 08/10] arm64: dts: qcom: qcs6490-rb3gen2-vision-mezzanine: Enable IMX577 sensor Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-8-b18ddcd7d9df@quicinc.com> References: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> In-Reply-To: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> To: Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kapatrala Syed , Hariram Purushothaman , "Bjorn Andersson" , Konrad Dybcio , Hans Verkuil , , Catalin Marinas , Will Deacon CC: , , , , , Vikram Sharma , Hariram Purushothaman X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1725448289; l=2580; i=quic_vikramsa@quicinc.com; s=20240628; h=from:subject:message-id; bh=3o55IMd7Rd92JBDtHfXiJsTPuh3E7dt5jNiMWieXmWc=; b=ZzD/bcaPGPNr2OVlW6f5ICZ7tzySK4TfSJU3NvA2OpZwS3EgDSsX2t01x4Lt3p3YhMIAnV+IB wRtbjLFUk/7BFZ8YjGjsnTeyQhCSSM1TKyhKoUJESdsqKIfIUvkhJ7c X-Developer-Key: i=quic_vikramsa@quicinc.com; a=ed25519; pk=vQBkwZr1Hv+VXogAyTAu7AEx8/6bvkOmgrzYFbNGCDI= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: EgPCxTlnN7nQsOntx8wZx0A26N-QAeCV X-Proofpoint-GUID: EgPCxTlnN7nQsOntx8wZx0A26N-QAeCV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_09,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 suspectscore=0 adultscore=0 bulkscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 mlxscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040084 X-LSpam-Score: -6.3 (------) X-LSpam-Report: No, score=-6.3 required=5.0 tests=ARC_SIGNED=0.001,ARC_VALID=-0.1,BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,DMARC_PASS=-0.001,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_VALIDITY_CERTIFIED=-3,RCVD_IN_VALIDITY_RPBL=1.31,RCVD_IN_VALIDITY_SAFE=-2,SPF_HELO_NONE=0.001,SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no Enable the IMX577 camera sensor for the qcs6490-rb3gen2-vision-mezzanine board. Signed-off-by: Hariram Purushothaman Signed-off-by: Vikram Sharma --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dts | 61 ++++++++++++++++++++++ 2 files changed, 62 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index ae002c7cf126..49ec82e0e28e 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -111,6 +111,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-vision-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += qrb2210-rb1.dtb diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dts new file mode 100644 index 000000000000..04b5fe80d38d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dts @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "qcs6490-rb3gen2.dts" + +&camcc { + status = "okay"; +}; + +&camss { + vdda-phy-supply = <&vreg_l10c_0p88>; + vdda-pll-supply = <&vreg_l6b_1p2>; + status = "okay"; + + ports { + /* The port index denotes CSIPHY id i.e. csiphy3 */ + port@3 { + reg = <3>; + csiphy3_ep: endpoint { + clock-lanes = <7>; + data-lanes = <0 1 2 3>; + remote-endpoint = <&imx577_ep>; + }; + }; + }; +}; + +&cci1 { + status = "okay"; +}; + +&cci1_i2c1 { + camera@1a { + compatible = "sony,imx577"; + reg = <0x1a>; + + reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "suspend"; + pinctrl-0 = <&cam2_default>; + pinctrl-1 = <&cam2_suspend>; + + clocks = <&camcc CAM_CC_MCLK3_CLK>; + assigned-clocks = <&camcc CAM_CC_MCLK3_CLK>; + assigned-clock-rates = <24000000>; + + dovdd-supply = <&vreg_l18b_1p8>; + + port { + imx577_ep: endpoint { + clock-lanes = <7>; + link-frequencies = /bits/ 64 <600000000>; + data-lanes = <0 1 2 3>; + remote-endpoint = <&csiphy3_ep>; + }; + }; + }; +}; From patchwork Wed Sep 4 11:10:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 103971 Received: from sv.mirrors.kernel.org ([139.178.88.99]) by linuxtv.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1slnyX-0006we-1s for patchwork@linuxtv.org; Wed, 04 Sep 2024 11:15:02 +0000 Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 043DB284E2F for ; Wed, 4 Sep 2024 11:15:01 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1D2F91D6191; Wed, 4 Sep 2024 11:12:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="EloNiOYc" X-Original-To: linux-media@vger.kernel.org Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 553561D58AE; Wed, 4 Sep 2024 11:12:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448364; cv=none; b=LX5OQSPClyPetJIlbvfiFKO2EVeABQamcMuMuEl0hIw0UxCshChGxhyuqJqDKp/XptzLz7+YWo37AJVYVBKCHu80bPkNUOcMXA5dSUHD9wJBpjmJosvDePxJj+VzrOQWFIEUBHBfI9KCMfwqKgTMD9joirUYa1AhYjNzQ2nI/i4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448364; c=relaxed/simple; bh=rK7Sz0VUiQsu/+Dk66VZA86C7CyVi8Nv6dkp8APimYM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=DDIeyEvXvjyTG05M8J194NeC1DcAD1m8mYIkeBcc+/wCCVDwtWcKrPvT7dE5cZOdiGiTsUMCEEQefsuEtOr6jKklwjf4/sWvBZXtYlcWYuE+hI0G0qWZ0DvbVzdh7XTqrXrJd92jcMah1Yvo/GvGZbz0rwt2+GbknAh3ZIj8z6Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=EloNiOYc; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 48484dUl010553; Wed, 4 Sep 2024 11:12:34 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= gyroIUJzbSHlGQXdBozdKEezOGySVnTVQSnWRwIRjLU=; b=EloNiOYcI5H06vvx cgsVXYTosXApw3jRa/xmwfnxUZPSNSBvQ/o5OVc+toTR/cPKu5xfwzoVWgxXPey9 bxQwzHibIbh7OLKiKv8rvIl2qL22h/CPeFz+iZonEBizQ8P+/Ca6wkWirqQg3J37 Lg4y+aNeOcSMdrIYcTjAeypro49zPMzssm+qIpRE4ygjd0XBn67fbn/Od3qkHjPo pO3aLUglPWMkFkhIxNBCx90eOlqrqUv0lLvme5rqj+lodGGLCx70s7DX/z5HuPT6 gJGjq3vukwEwHYNf1CYXNgs/ZsXI/OdHQBF2fVfG5e42vQajYuo1ai9VQ8drFfXS gsyvRQ== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41e0bhkqtg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 11:12:33 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 484BCWU3003456 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Sep 2024 11:12:32 GMT Received: from [169.254.0.1] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Sep 2024 04:12:26 -0700 From: Vikram Sharma Date: Wed, 4 Sep 2024 16:40:15 +0530 Subject: [PATCH 09/10] arm64: dts: qcom: sc7280: Add default and suspend states for GPIO Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-9-b18ddcd7d9df@quicinc.com> References: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> In-Reply-To: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> To: Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kapatrala Syed , Hariram Purushothaman , "Bjorn Andersson" , Konrad Dybcio , Hans Verkuil , , Catalin Marinas , Will Deacon CC: , , , , , Vikram Sharma , Hariram Purushothaman , Trishansh Bhardwaj X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1725448289; l=1406; i=quic_vikramsa@quicinc.com; s=20240628; h=from:subject:message-id; bh=rK7Sz0VUiQsu/+Dk66VZA86C7CyVi8Nv6dkp8APimYM=; b=S2Tldcss8uYLKSzM2Xx04DghCj8GbcWJINI/i9cImGmcWF4X/YG12XNIt2/em9c+nRPvavxob 82mc8RT2nw9CdlPyobC0jM0LLVO8hFEXO5TDLskkyDHpl1P/2n2Zj5f X-Developer-Key: i=quic_vikramsa@quicinc.com; a=ed25519; pk=vQBkwZr1Hv+VXogAyTAu7AEx8/6bvkOmgrzYFbNGCDI= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: bP2cUX-DZDRgXqFGb28ADtko7W9ZNemT X-Proofpoint-GUID: bP2cUX-DZDRgXqFGb28ADtko7W9ZNemT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_09,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=742 priorityscore=1501 suspectscore=0 adultscore=0 bulkscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 mlxscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040084 X-LSpam-Score: -8.6 (--------) X-LSpam-Report: No, score=-8.6 required=5.0 tests=ARC_SIGNED=0.001,ARC_VALID=-0.1,BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,DMARC_PASS=-0.001,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_MED=-2.3,RCVD_IN_VALIDITY_CERTIFIED=-3,RCVD_IN_VALIDITY_RPBL=1.31,RCVD_IN_VALIDITY_SAFE=-2,SPF_HELO_NONE=0.001,SPF_PASS=-0.001 autolearn=ham autolearn_force=no Add default and suspend states for GPIO 67 and 78 on the SC7280. Signed-off-by: Hariram Purushothaman Signed-off-by: Trishansh Bhardwaj Signed-off-by: Vikram Sharma --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 109aafe967f8..8788ae9f57ee 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -5164,6 +5164,39 @@ cci3_sleep: cci3-sleep-state { bias-pull-down; }; + cam2_default: cam2-default { + rst { + pins = "gpio78"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + mclk { + pins = "gpio67"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + }; + + cam2_suspend: cam2-suspend { + rst { + pins = "gpio78"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + + mclk { + pins = "gpio67"; + function = "cam_mclk"; + drive-strength = <2>; + bias-pull-down; + }; + }; + dp_hot_plug_det: dp-hot-plug-det-state { pins = "gpio47"; function = "dp_hot"; From patchwork Wed Sep 4 11:10:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 103972 Received: from ny.mirrors.kernel.org ([147.75.199.223]) by linuxtv.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1slnz7-00078m-2d for patchwork@linuxtv.org; Wed, 04 Sep 2024 11:15:38 +0000 Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id AD9AF1C22118 for ; Wed, 4 Sep 2024 11:15:36 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2E8641D0DCE; Wed, 4 Sep 2024 11:12:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="LXMt5PlR" X-Original-To: linux-media@vger.kernel.org Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D8F9C1D79A2; Wed, 4 Sep 2024 11:12:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448377; cv=none; b=hham8N5/RK1cTNmkIUZj3nHBMoANAepOA7NTFrhPkjx/O5pigVOUn1g4XedNhXI5pjxSB1EWq9/WutGJE8IqYP8d3ajZs3hf4l5KxzMp44iG38c4t0FiyK9VssffFeqGXw2sokPgCX894f7h5k/9l84koy/9D8r8/lP3JDEA3vI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725448377; c=relaxed/simple; bh=2u5ime7s/fgypt0XwHQBEz88r0tT5SbaMyJrevI5Q6w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=kVfaf/e/PJ+TGdJotp3i2hBA33UEGgcJWyWduh1AnxhqzAFuYGNVWPlV+RRxfeiCHuPUBJDG1Q4rBW146eIFzFQcP/AaV3eE8TmyGGcV1Vmogos0sQdsJOW6IGmppT0RsN0fdsS85Q06MgjHd2m5JFNqRo6/MVQCpdtGtC6G2Gg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=LXMt5PlR; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 484AHtM8028627; Wed, 4 Sep 2024 11:12:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 8B/rDpPJcAkp4gYZp904VaY+g1GBbyAGo0z0QdNppOo=; b=LXMt5PlR+wJHADn6 nnD3+mRlQn1/j4j/p0W1gc1Evi5fbEU2tkc/QTDp2y/qLOTDl0ZiOTLnBrAd7gBz 60YmoCw2+/GCbZSGPs1HXcOyLZHr+upVACgZP2hgY02JiCbemmLqofsM1uKN/TMN sF/q27Z+IHu3qgpMEpg26kj3zJCm+ZK5gA6uX1Zuo2x1ZZUD/Ueol6z8846jiWPO jFCiQTTiK3sDzFtG+CVR63x7Hm548D1pUwWHf+BeXFa/NbvRVZqSB8wmeh6HydY1 3TkH8l9qm8t+n2ApBJ10Lfc5T6zjMzXDMweZF4YFGRcqIo4Lvxp+vRuI4zuHud7e qYgJeg== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41buxfabjy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 11:12:39 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 484BCc4h029900 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Sep 2024 11:12:38 GMT Received: from [169.254.0.1] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Sep 2024 04:12:32 -0700 From: Vikram Sharma Date: Wed, 4 Sep 2024 16:40:16 +0530 Subject: [PATCH 10/10] arm64: defconfig: Enable camcc driver for SC7280 Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-10-b18ddcd7d9df@quicinc.com> References: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> In-Reply-To: <20240904-camss_on_sc7280_rb3gen2_vision_v2_patches-v1-0-b18ddcd7d9df@quicinc.com> To: Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kapatrala Syed , Hariram Purushothaman , "Bjorn Andersson" , Konrad Dybcio , Hans Verkuil , , Catalin Marinas , Will Deacon CC: , , , , , Vikram Sharma X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1725448289; l=608; i=quic_vikramsa@quicinc.com; s=20240628; h=from:subject:message-id; bh=2u5ime7s/fgypt0XwHQBEz88r0tT5SbaMyJrevI5Q6w=; b=3k/3cqqopocrY1gZPu8ZHuaJDGqlu/yC7/p7pjoCrj5TRN7+0dKi8PmAbB6EfND4jLgKgvoSo 9PwoV9o2zcwBHJc0V+jNkdnVJJZYBqqktlBY7uPcdhI7vcBqlRHWXRD X-Developer-Key: i=quic_vikramsa@quicinc.com; a=ed25519; pk=vQBkwZr1Hv+VXogAyTAu7AEx8/6bvkOmgrzYFbNGCDI= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: bkJdEFaJlfYUVP3GVGry1Qokgb_FOxDa X-Proofpoint-ORIG-GUID: bkJdEFaJlfYUVP3GVGry1Qokgb_FOxDa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_09,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 adultscore=0 clxscore=1015 mlxlogscore=566 lowpriorityscore=0 phishscore=0 bulkscore=0 mlxscore=0 impostorscore=0 priorityscore=1501 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040084 X-LSpam-Score: -6.3 (------) X-LSpam-Report: No, score=-6.3 required=5.0 tests=ARC_SIGNED=0.001,ARC_VALID=-0.1,BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,DMARC_PASS=-0.001,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_VALIDITY_CERTIFIED=-3,RCVD_IN_VALIDITY_RPBL=1.31,RCVD_IN_VALIDITY_SAFE=-2,SPF_HELO_NONE=0.001,SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no Enable the camera clock driver for SC7280. Signed-off-by: Vikram Sharma --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index f064c7c91dbb..c54097a00daf 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1322,6 +1322,7 @@ CONFIG_QCM_DISPCC_2290=m CONFIG_QCS_GCC_404=y CONFIG_QDU_GCC_1000=y CONFIG_SC_CAMCC_8280XP=m +CONFIG_SC_CAMCC_7280=m CONFIG_SC_DISPCC_7280=m CONFIG_SC_DISPCC_8280XP=m CONFIG_SA_GCC_8775P=y