From patchwork Fri Oct 20 04:09:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jason Z" X-Patchwork-Id: 96089 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1qtgqg-002jBo-HZ; Fri, 20 Oct 2023 04:10:59 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346954AbjJTEK5 (ORCPT + 1 other); Fri, 20 Oct 2023 00:10:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38268 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346945AbjJTEKz (ORCPT ); Fri, 20 Oct 2023 00:10:55 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E3405106 for ; Thu, 19 Oct 2023 21:10:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697775053; x=1729311053; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=C0VNA/NG8+jhVwJvCjquQ09ojiw1CWDBXoPjAyCFJ3U=; b=QPVYz783JFLIRMMl6DwXJWMbw91bem7aPQDwcA7qv40711tItPl5NQ0Q XKpHiaYTj2FxsQ1K2223Twx2GQl/peBjKrlEPjUpMdXUuj7azZZFHZG9w 92pQS8MdCByX4TRvtXPJPSUEyqKGWS5GBwug7HlCjAb4UpYijqD8l9xGY HkuxJJT1zxpY8JyGqmqxd4U9ynLrWl9644K0//zse4lvQSOwm59oVZd+9 PFE3O29sLLcMRrP9gy7BJjNkYGjm3+ZEIH3+m9agVO15kpTxr+z0FRRr0 VLPORjzwGvw1C2JldPZqY06gDQa/++k2npNVKxeJAolXufj4PPm2kkxYl g==; X-IronPort-AV: E=McAfee;i="6600,9927,10868"; a="366659484" X-IronPort-AV: E=Sophos;i="6.03,238,1694761200"; d="scan'208";a="366659484" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Oct 2023 21:10:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10868"; a="880945060" X-IronPort-AV: E=Sophos;i="6.03,238,1694761200"; d="scan'208";a="880945060" Received: from jasonz-ms-7d25.itwn.intel.com ([10.227.107.10]) by orsmga004.jf.intel.com with ESMTP; 19 Oct 2023 21:10:51 -0700 From: "Chen, Jason Z" To: sakari.ailus@linux.intel.com, andy.yeh@intel.com Cc: linux-media@vger.kernel.org, bingbu.cao@linux.intel.com, qingwu.zhang@intel.com, Jason Chen Subject: [PATCH v1] media: ov08x40: Add Signal Integration Adjustments for specific project Date: Fri, 20 Oct 2023 12:09:08 +0800 Message-Id: <20231020040908.2706654-1-jason.z.chen@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -4.8 (----) X-LSpam-Report: No, score=-4.8 required=5.0 tests=BAYES_00=-1.9,DKIMWL_WL_HIGH=0.001,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_MED=-2.3 autolearn=ham autolearn_force=no From: Jason Chen Due to certain MIPI hardware designs using overly long cables, there is a loss of signal strength, resulting in failed signal integration. The patch includes changes to adjust the driving strength in the register settings for a specific project. Signed-off-by: Jason Chen --- drivers/media/i2c/ov08x40.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/media/i2c/ov08x40.c b/drivers/media/i2c/ov08x40.c index 0b3b906ebef..4f13e23b325 100644 --- a/drivers/media/i2c/ov08x40.c +++ b/drivers/media/i2c/ov08x40.c @@ -160,6 +160,18 @@ static const struct ov08x40_reg mipi_data_rate_800mbps[] = { {0x6002, 0x2e}, }; +static const struct ov08x40_reg mipi_si_changed_regs[] = { + {0x481b, 0x2c}, /* HS Exit: Data Tx TEOT - reducing 8ns */ + {0x4826, 0x42}, /* HS Entry: Data Tx TREOT - raising 8ns */ + {0x4829, 0x54}, /* HS Exit: Data Tx TREOT - reducing 8ns */ + {0x4885, 0x1f}, /* driving strength change */ +}; + +struct ov08x40_reg_list si_regs = { + .regs = mipi_si_changed_regs, + .num_of_regs = ARRAY_SIZE(mipi_si_changed_regs), +}; + static const struct ov08x40_reg mode_3856x2416_regs[] = { {0x5000, 0x5d}, {0x5001, 0x20}, @@ -2917,6 +2929,11 @@ static int ov08x40_start_streaming(struct ov08x40 *ov08x) return ret; } + /* Apply SI change to current project */ + reg_list = &si_regs; + + ov08x40_write_reg_list(ov08x, reg_list); + /* Apply default values of current mode */ reg_list = &ov08x->cur_mode->reg_list; ret = ov08x40_write_reg_list(ov08x, reg_list);