From patchwork Tue Jun 6 16:58:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 92355 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1q6a1S-00GO7Q-PB; Tue, 06 Jun 2023 16:59:07 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238143AbjFFQ7F (ORCPT + 1 other); Tue, 6 Jun 2023 12:59:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237730AbjFFQ7E (ORCPT ); Tue, 6 Jun 2023 12:59:04 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B82F6E6B for ; Tue, 6 Jun 2023 09:58:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1686070695; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=AyXctrUfoTwlvZnQqB5zl0vSAuCk35E4TLUju/L+FWM=; b=TthbMzmg4rfQaHv6/Sjofg7+Hlb10dZN9vNlL/zmAowjxntkZmwkcyK1n4qtgV2VfNESkf br58LGPU1lF41uB49vbV38cQXmuvMpXiGGbYKv+UhkurXhIFaht8i9v0jJTAOFN3Z91Lqf pEUzyW3ahDdyDdxx1gpiLfef3S2eC4c= Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-533-vpGAIjwpNXuN_TwKHlOi7w-1; Tue, 06 Jun 2023 12:58:12 -0400 X-MC-Unique: vpGAIjwpNXuN_TwKHlOi7w-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 27DDA384CC49; Tue, 6 Jun 2023 16:58:12 +0000 (UTC) Received: from x1.nl (unknown [10.39.192.155]) by smtp.corp.redhat.com (Postfix) with ESMTP id 18B5D492B00; Tue, 6 Jun 2023 16:58:10 +0000 (UTC) From: Hans de Goede To: Laurent Pinchart , Sakari Ailus Cc: Hans de Goede , Mauro Carvalho Chehab , Andy Shevchenko , linux-media@vger.kernel.org Subject: [PATCH 1/3] media: Add MIPI CCI register access helper functions Date: Tue, 6 Jun 2023 18:58:06 +0200 Message-Id: <20230606165808.70751-2-hdegoede@redhat.com> In-Reply-To: <20230606165808.70751-1-hdegoede@redhat.com> References: <20230606165808.70751-1-hdegoede@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.9 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -4.8 (----) X-LSpam-Report: No, score=-4.8 required=5.0 tests=BAYES_00=-1.9,DKIMWL_WL_HIGH=0.001,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_MED=-2.3 autolearn=ham autolearn_force=no The CSI2 specification specifies a standard method to access camera sensor registers called "Camera Control Interface (CCI)". This uses either 8 or 16 bit (big-endian wire order) register addresses and supports 8, 16, 24 or 32 bit (big-endian wire order) register widths. Currently a lot of Linux camera sensor drivers all have their own custom helpers for this, often copy and pasted from other drivers. Add a set of generic helpers for this so that all sensor drivers can switch to a single common implementation. These helpers take an extra optional "int *err" function parameter, this can be used to chain a bunch of register accesses together with only a single error check at the end, rather then needing to error check each individual register access. The first failing call will set the contents of err to a non 0 value and all other calls will then become no-ops. Link: https://lore.kernel.org/linux-media/59aefa7f-7bf9-6736-6040-39551329cd0a@redhat.com/ Signed-off-by: Hans de Goede --- Documentation/driver-api/media/v4l2-cci.rst | 5 + Documentation/driver-api/media/v4l2-core.rst | 1 + drivers/media/v4l2-core/Kconfig | 5 + drivers/media/v4l2-core/Makefile | 1 + drivers/media/v4l2-core/v4l2-cci.c | 142 +++++++++++++++++++ include/media/v4l2-cci.h | 109 ++++++++++++++ 6 files changed, 263 insertions(+) create mode 100644 Documentation/driver-api/media/v4l2-cci.rst create mode 100644 drivers/media/v4l2-core/v4l2-cci.c create mode 100644 include/media/v4l2-cci.h diff --git a/Documentation/driver-api/media/v4l2-cci.rst b/Documentation/driver-api/media/v4l2-cci.rst new file mode 100644 index 000000000000..dd297a40ed20 --- /dev/null +++ b/Documentation/driver-api/media/v4l2-cci.rst @@ -0,0 +1,5 @@ +.. SPDX-License-Identifier: GPL-2.0 + +V4L2 CCI kAPI +^^^^^^^^^^^^^ +.. kernel-doc:: include/media/v4l2-cci.h diff --git a/Documentation/driver-api/media/v4l2-core.rst b/Documentation/driver-api/media/v4l2-core.rst index 1a8c4a5f256b..239045ecc8f4 100644 --- a/Documentation/driver-api/media/v4l2-core.rst +++ b/Documentation/driver-api/media/v4l2-core.rst @@ -22,6 +22,7 @@ Video4Linux devices v4l2-mem2mem v4l2-async v4l2-fwnode + v4l2-cci v4l2-rect v4l2-tuner v4l2-common diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig index 348559bc2468..523ba243261d 100644 --- a/drivers/media/v4l2-core/Kconfig +++ b/drivers/media/v4l2-core/Kconfig @@ -74,6 +74,11 @@ config V4L2_FWNODE config V4L2_ASYNC tristate +config V4L2_CCI + tristate + depends on I2C + select REGMAP_I2C + # Used by drivers that need Videobuf modules config VIDEOBUF_GEN tristate diff --git a/drivers/media/v4l2-core/Makefile b/drivers/media/v4l2-core/Makefile index 41d91bd10cf2..be2551705755 100644 --- a/drivers/media/v4l2-core/Makefile +++ b/drivers/media/v4l2-core/Makefile @@ -25,6 +25,7 @@ videodev-$(CONFIG_VIDEO_V4L2_I2C) += v4l2-i2c.o # (e. g. LC_ALL=C sort Makefile) obj-$(CONFIG_V4L2_ASYNC) += v4l2-async.o +obj-$(CONFIG_V4L2_CCI) += v4l2-cci.o obj-$(CONFIG_V4L2_FLASH_LED_CLASS) += v4l2-flash-led-class.o obj-$(CONFIG_V4L2_FWNODE) += v4l2-fwnode.o obj-$(CONFIG_V4L2_H264) += v4l2-h264.o diff --git a/drivers/media/v4l2-core/v4l2-cci.c b/drivers/media/v4l2-core/v4l2-cci.c new file mode 100644 index 000000000000..21207d137dbe --- /dev/null +++ b/drivers/media/v4l2-core/v4l2-cci.c @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MIPI Camera Control Interface (CCI) register access helpers. + * + * Copyright (C) 2023 Hans de Goede + */ + +#include +#include +#include +#include + +#include + +int cci_read(struct regmap *map, u32 reg, u32 *val, int *err) +{ + int i, len, ret; + u8 buf[4]; + + if (err && *err) + return *err; + + /* Set len to register width in bytes */ + len = ((reg & CCI_REG_WIDTH_MASK) >> CCI_REG_WIDTH_SHIFT) + 1; + reg &= CCI_REG_ADDR_MASK; + + ret = regmap_bulk_read(map, reg, buf, len); + if (ret) { + dev_err(regmap_get_device(map), "Error reading reg 0x%4x: %d\n", reg, ret); + if (err) + *err = ret; + + return ret; + } + + *val = 0; + for (i = 0; i < len; i++) { + *val <<= 8; + *val |= buf[i]; + } + + return 0; +} +EXPORT_SYMBOL_GPL(cci_read); + +int cci_write(struct regmap *map, u32 reg, u32 val, int *err) +{ + int i, len, ret; + u8 buf[4]; + + if (err && *err) + return *err; + + /* Set len to register width in bytes */ + len = ((reg & CCI_REG_WIDTH_MASK) >> CCI_REG_WIDTH_SHIFT) + 1; + reg &= CCI_REG_ADDR_MASK; + + for (i = 0; i < len; i++) { + buf[len - i - 1] = val & 0xff; + val >>= 8; + } + + ret = regmap_bulk_write(map, reg, buf, len); + if (ret) { + dev_err(regmap_get_device(map), "Error writing reg 0x%4x: %d\n", reg, ret); + if (err) + *err = ret; + } + + return ret; +} +EXPORT_SYMBOL_GPL(cci_write); + +int cci_update_bits(struct regmap *map, u32 reg, u32 mask, u32 val, int *err) +{ + int width, ret; + u32 readval; + + if (err && *err) + return *err; + + /* + * For single byte updates use regmap_update_bits(), this uses + * the regmap-lock to protect against other read-modify-writes racing. + */ + width = (reg & CCI_REG_WIDTH_MASK) >> CCI_REG_WIDTH_SHIFT; + if (width == cci_reg_8) { + reg &= CCI_REG_ADDR_MASK; + ret = regmap_update_bits(map, reg, mask, val); + if (ret) { + dev_err(regmap_get_device(map), "Error updating reg 0x%4x: %d\n", reg, ret); + if (err) + *err = ret; + } + + return ret; + } + + ret = cci_read(map, reg, &readval, err); + if (ret) + return ret; + + val = (readval & ~mask) | (val & mask); + + return cci_write(map, reg, val, err); +} +EXPORT_SYMBOL_GPL(cci_update_bits); + +int cci_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, int num_regs, int *err) +{ + int i, ret; + + if (err && *err) + return *err; + + for (i = 0; i < num_regs; i++) { + ret = cci_write(map, regs[i].reg, regs[i].def, err); + if (ret) + return ret; + + if (regs[i].delay_us) + fsleep(regs[i].delay_us); + } + + return 0; +} +EXPORT_SYMBOL_GPL(cci_multi_reg_write); + +struct regmap *cci_regmap_init_i2c(struct i2c_client *client, int reg_addr_bits) +{ + struct regmap_config config = { + .reg_bits = reg_addr_bits, + .val_bits = 8, + .reg_format_endian = REGMAP_ENDIAN_BIG, + }; + + return devm_regmap_init_i2c(client, &config); +} +EXPORT_SYMBOL_GPL(cci_regmap_init_i2c); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Hans de Goede "); diff --git a/include/media/v4l2-cci.h b/include/media/v4l2-cci.h new file mode 100644 index 000000000000..69b8a7c4a013 --- /dev/null +++ b/include/media/v4l2-cci.h @@ -0,0 +1,109 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * MIPI Camera Control Interface (CCI) register access helpers. + * + * Copyright (C) 2023 Hans de Goede + */ +#ifndef _V4L2_CCI_H +#define _V4L2_CCI_H + +#include +#include + +/* + * Note cci_reg_8 deliberately is 0, not 1, so that raw + * (not wrapped in a CCI_REG*() macro) register addresses + * do 8 bit wide accesses. This allows unchanged use of register + * initialization lists of raw address, value pairs which only + * do 8 bit width accesses. Which makes porting drivers easier. + */ +enum cci_reg_type { + cci_reg_8 = 0, + cci_reg_16, + cci_reg_24, + cci_reg_32, +}; + +/* + * Macros to define register address with the register width encoded + * into the higher bits. CCI_REG8() is a no-op so its use is optional. + */ +#define CCI_REG_ADDR_MASK GENMASK(15, 0) +#define CCI_REG_WIDTH_SHIFT 16 +#define CCI_REG_WIDTH_MASK GENMASK(17, 16) + +#define CCI_REG8(x) ((cci_reg_8 << CCI_REG_WIDTH_SHIFT) | (x)) +#define CCI_REG16(x) ((cci_reg_16 << CCI_REG_WIDTH_SHIFT) | (x)) +#define CCI_REG24(x) ((cci_reg_24 << CCI_REG_WIDTH_SHIFT) | (x)) +#define CCI_REG32(x) ((cci_reg_32 << CCI_REG_WIDTH_SHIFT) | (x)) + +/** + * cci_read() - Read a value from a single CCI register + * + * @map: Register map to write to + * @reg: Register address to write, use CCI_REG#() macros to encode reg width + * @val: Pointer to store read value + * @err: optional pointer to store errors, if a previous error is set the write will be skipped + * + * Return: %0 on success or a negative error code on failure. + */ +int cci_read(struct regmap *map, u32 reg, u32 *val, int *err); + +/** + * cci_write() - Write a value to a single CCI register + * + * @map: Register map to write to + * @reg: Register address to write, use CCI_REG#() macros to encode reg width + * @val: Value to be written + * @err: optional pointer to store errors, if a previous error is set the write will be skipped + * + * Return: %0 on success or a negative error code on failure. + */ +int cci_write(struct regmap *map, u32 reg, u32 val, int *err); + +/** + * cci_update_bits() - Perform a read/modify/write cycle on a single CCI register + * + * @map: Register map to write to + * @reg: Register address to write, use CCI_REG#() macros to encode reg width + * @mask: Bitmask to change + * @val: New value for bitmask + * @err: optional pointer to store errors, if a previous error is set the update will be skipped + * + * For 8 bit width registers this is guaranteed to be atomic wrt other + * cci_*() register access functions. For multi-byte width registers + * atomicity is NOT guaranteed. + * + * Return: %0 on success or a negative error code on failure. + */ +int cci_update_bits(struct regmap *map, u32 reg, u32 mask, u32 val, int *err); + +/** + * cci_multi_reg_write() - Write multiple registers to the device + * + * @map: Register map to write to + * @regs: Array of structures containing register-address, value pairs to be written + * register-addresses use CCI_REG#() macros to encode reg width + * @num_regs: Number of registers to write + * @err: optional pointer to store errors, if a previous error is set the update will be skipped + * + * Write multiple registers to the device where the set of register, value + * pairs are supplied in any order, possibly not all in a single range. + * + * Return: %0 on success or a negative error code on failure. + */ +int cci_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, int num_regs, int *err); + +/** + * cci_regmap_init_i2c() - Create regmap to use with cci_*() register access functions + * + * @client: i2c_client to create the regmap for + * @reg_addr_bits: register address width to use (8 or 16) + * + * Note the memory for the created regmap is devm() managed, tied to the client. + * + * Return: %0 on success or a negative error code on failure. + */ +struct regmap *cci_regmap_init_i2c(struct i2c_client *client, int reg_addr_bits); + +#endif From patchwork Tue Jun 6 16:58:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 92353 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1q6a1P-00GO7Q-Dg; Tue, 06 Jun 2023 16:59:04 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237797AbjFFQ7B (ORCPT + 1 other); Tue, 6 Jun 2023 12:59:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237730AbjFFQ67 (ORCPT ); Tue, 6 Jun 2023 12:58:59 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4EC410EA for ; Tue, 6 Jun 2023 09:58:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1686070697; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XpzbuEHZv0SEw2Pw2gxWDjMQwdkImK4r+Onm9+KDtIM=; b=No8hsAqzZpJEBcPq7zShUxk+4y9xZMiSHwie/E/7yeuDsP8qlzSaHWtBFezQpvQwNRWi0f V7a9a9ktZJn0iABLLIcCGjeZnh6NAkRGNISUyAQLD6s9SBo1kda78r8m7S/f37YV/op2bd 38aOeGx2hnUmN2pNGTKS6xrsp4yGxDw= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-583-sXYClgYpOri5CGcNGAdluw-1; Tue, 06 Jun 2023 12:58:13 -0400 X-MC-Unique: sXYClgYpOri5CGcNGAdluw-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 6A61B101A53A; Tue, 6 Jun 2023 16:58:13 +0000 (UTC) Received: from x1.nl (unknown [10.39.192.155]) by smtp.corp.redhat.com (Postfix) with ESMTP id 62EE9492B00; Tue, 6 Jun 2023 16:58:12 +0000 (UTC) From: Hans de Goede To: Laurent Pinchart , Sakari Ailus Cc: Hans de Goede , Mauro Carvalho Chehab , Andy Shevchenko , linux-media@vger.kernel.org Subject: [PATCH 2/3] media: atomisp: ov2680: Convert to new CCI register access helpers Date: Tue, 6 Jun 2023 18:58:07 +0200 Message-Id: <20230606165808.70751-3-hdegoede@redhat.com> In-Reply-To: <20230606165808.70751-1-hdegoede@redhat.com> References: <20230606165808.70751-1-hdegoede@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.9 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -4.8 (----) X-LSpam-Report: No, score=-4.8 required=5.0 tests=BAYES_00=-1.9,DKIMWL_WL_HIGH=0.001,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_MED=-2.3 autolearn=ham autolearn_force=no Use the new comon CCI register access helpers to replace the private register access helpers in the ov2680 driver. While at it also switch to using the same register address defines as the standard drivers/media/i2c/ov2680.c driver to make merging the 2 drivers simpler. Signed-off-by: Hans de Goede Reviewed-by: Laurent Pinchart --- drivers/staging/media/atomisp/i2c/Kconfig | 1 + .../media/atomisp/i2c/atomisp-ov2680.c | 233 ++++++++---------- drivers/staging/media/atomisp/i2c/ov2680.h | 73 +----- 3 files changed, 104 insertions(+), 203 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/Kconfig b/drivers/staging/media/atomisp/i2c/Kconfig index 16b6b808d4a7..e353b7fdbff0 100644 --- a/drivers/staging/media/atomisp/i2c/Kconfig +++ b/drivers/staging/media/atomisp/i2c/Kconfig @@ -53,6 +53,7 @@ config VIDEO_ATOMISP_OV2680 tristate "Omnivision OV2680 sensor support" depends on ACPI depends on I2C && VIDEO_DEV + select V4L2_CCI help This is a Video4Linux2 sensor-level driver for the Omnivision OV2680 raw camera. diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index 77070bbd0157..3cc56090677c 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -25,11 +25,47 @@ #include #include -#include #include #include "ov2680.h" +#define OV2680_CHIP_ID 0x2680 + +#define OV2680_REG_STREAM_CTRL CCI_REG8(0x0100) +#define OV2680_REG_SOFT_RESET CCI_REG8(0x0103) + +#define OV2680_REG_CHIP_ID CCI_REG16(0x300a) +#define OV2680_REG_SC_CMMN_SUB_ID CCI_REG8(0x302a) + +#define OV2680_REG_EXPOSURE_PK CCI_REG24(0x3500) +#define OV2680_REG_R_MANUAL CCI_REG8(0x3503) +#define OV2680_REG_GAIN_PK CCI_REG16(0x350a) + +#define OV2680_REG_SENSOR_CTRL_0A CCI_REG8(0x370a) + +#define OV2680_REG_HORIZONTAL_START CCI_REG16(0x3800) +#define OV2680_REG_VERTICAL_START CCI_REG16(0x3802) +#define OV2680_REG_HORIZONTAL_END CCI_REG16(0x3804) +#define OV2680_REG_VERTICAL_END CCI_REG16(0x3806) +#define OV2680_REG_HORIZONTAL_OUTPUT_SIZE CCI_REG16(0x3808) +#define OV2680_REG_VERTICAL_OUTPUT_SIZE CCI_REG16(0x380a) +#define OV2680_REG_TIMING_HTS CCI_REG16(0x380c) +#define OV2680_REG_TIMING_VTS CCI_REG16(0x380e) +#define OV2680_REG_ISP_X_WIN CCI_REG16(0x3810) +#define OV2680_REG_ISP_Y_WIN CCI_REG16(0x3812) +#define OV2680_REG_X_INC CCI_REG8(0x3814) +#define OV2680_REG_Y_INC CCI_REG8(0x3815) +#define OV2680_REG_FORMAT1 CCI_REG8(0x3820) +#define OV2680_REG_FORMAT2 CCI_REG8(0x3821) + +#define OV2680_REG_ISP_CTRL00 CCI_REG8(0x5080) + +#define OV2680_REG_X_WIN CCI_REG16(0x5704) +#define OV2680_REG_Y_WIN CCI_REG16(0x5706) + +#define OV2680_FRAME_RATE 30 +#define OV2680_INTEGRATION_TIME_MARGIN 8 + static const struct v4l2_rect ov2680_default_crop = { .left = OV2680_ACTIVE_START_LEFT, .top = OV2680_ACTIVE_START_TOP, @@ -37,21 +73,6 @@ static const struct v4l2_rect ov2680_default_crop = { .height = OV2680_ACTIVE_HEIGHT, }; -static int ov2680_write_reg_array(struct i2c_client *client, - const struct ov2680_reg *reglist) -{ - const struct ov2680_reg *next = reglist; - int ret; - - for (; next->reg != 0; next++) { - ret = ov_write_reg8(client, next->reg, next->val); - if (ret) - return ret; - } - - return 0; -} - static void ov2680_set_bayer_order(struct ov2680_dev *sensor, struct v4l2_mbus_framefmt *fmt) { static const int ov2680_hv_flip_bayer_order[] = { @@ -78,7 +99,8 @@ static int ov2680_set_vflip(struct ov2680_dev *sensor, s32 val) if (sensor->is_streaming) return -EBUSY; - ret = ov_update_reg(sensor->client, OV2680_REG_FORMAT1, BIT(2), val ? BIT(2) : 0); + ret = cci_update_bits(sensor->regmap, OV2680_REG_FORMAT1, BIT(2), + val ? BIT(2) : 0, NULL); if (ret < 0) return ret; @@ -93,7 +115,8 @@ static int ov2680_set_hflip(struct ov2680_dev *sensor, s32 val) if (sensor->is_streaming) return -EBUSY; - ret = ov_update_reg(sensor->client, OV2680_REG_FORMAT2, BIT(2), val ? BIT(2) : 0); + ret = cci_update_bits(sensor->regmap, OV2680_REG_FORMAT2, BIT(2), + val ? BIT(2) : 0, NULL); if (ret < 0) return ret; @@ -103,30 +126,25 @@ static int ov2680_set_hflip(struct ov2680_dev *sensor, s32 val) static int ov2680_exposure_set(struct ov2680_dev *sensor, u32 exp) { - return ov_write_reg24(sensor->client, OV2680_REG_EXPOSURE_PK_HIGH, exp << 4); + return cci_write(sensor->regmap, OV2680_REG_EXPOSURE_PK, exp << 4, NULL); } static int ov2680_gain_set(struct ov2680_dev *sensor, u32 gain) { - return ov_write_reg16(sensor->client, OV2680_REG_GAIN_PK, gain); + return cci_write(sensor->regmap, OV2680_REG_GAIN_PK, gain, NULL); } static int ov2680_test_pattern_set(struct ov2680_dev *sensor, int value) { - int ret; + int ret = 0; if (!value) - return ov_update_reg(sensor->client, OV2680_REG_ISP_CTRL00, BIT(7), 0); + return cci_update_bits(sensor->regmap, OV2680_REG_ISP_CTRL00, BIT(7), 0, NULL); - ret = ov_update_reg(sensor->client, OV2680_REG_ISP_CTRL00, 0x03, value - 1); - if (ret < 0) - return ret; + cci_update_bits(sensor->regmap, OV2680_REG_ISP_CTRL00, 0x03, value - 1, &ret); + cci_update_bits(sensor->regmap, OV2680_REG_ISP_CTRL00, BIT(7), BIT(7), &ret); - ret = ov_update_reg(sensor->client, OV2680_REG_ISP_CTRL00, BIT(7), BIT(7)); - if (ret < 0) - return ret; - - return 0; + return ret; } static int ov2680_s_ctrl(struct v4l2_ctrl *ctrl) @@ -171,15 +189,16 @@ static const struct v4l2_ctrl_ops ov2680_ctrl_ops = { static int ov2680_init_registers(struct v4l2_subdev *sd) { - struct i2c_client *client = v4l2_get_subdevdata(sd); - int ret; + struct ov2680_dev *sensor = to_ov2680_sensor(sd); + int ret = 0; - ret = ov_write_reg8(client, OV2680_SW_RESET, 0x01); + cci_write(sensor->regmap, OV2680_REG_SOFT_RESET, 0x01, &ret); /* Wait for sensor reset */ usleep_range(1000, 2000); - ret |= ov2680_write_reg_array(client, ov2680_global_setting); + cci_multi_reg_write(sensor->regmap, ov2680_global_setting, + ARRAY_SIZE(ov2680_global_setting), &ret); return ret; } @@ -247,9 +266,8 @@ static void ov2680_calc_mode(struct ov2680_dev *sensor) static int ov2680_set_mode(struct ov2680_dev *sensor) { - struct i2c_client *client = sensor->client; u8 sensor_ctrl_0a, inc, fmt1, fmt2; - int ret; + int ret = 0; if (sensor->mode.binning) { sensor_ctrl_0a = 0x23; @@ -263,77 +281,27 @@ static int ov2680_set_mode(struct ov2680_dev *sensor) fmt2 = 0x00; } - ret = ov_write_reg8(client, OV2680_REG_SENSOR_CTRL_0A, sensor_ctrl_0a); - if (ret) - return ret; + cci_write(sensor->regmap, OV2680_REG_SENSOR_CTRL_0A, sensor_ctrl_0a, &ret); + cci_write(sensor->regmap, OV2680_REG_HORIZONTAL_START, sensor->mode.h_start, &ret); + cci_write(sensor->regmap, OV2680_REG_VERTICAL_START, sensor->mode.v_start, &ret); + cci_write(sensor->regmap, OV2680_REG_HORIZONTAL_END, sensor->mode.h_end, &ret); + cci_write(sensor->regmap, OV2680_REG_VERTICAL_END, sensor->mode.v_end, &ret); + cci_write(sensor->regmap, OV2680_REG_HORIZONTAL_OUTPUT_SIZE, + sensor->mode.h_output_size, &ret); + cci_write(sensor->regmap, OV2680_REG_VERTICAL_OUTPUT_SIZE, + sensor->mode.v_output_size, &ret); + cci_write(sensor->regmap, OV2680_REG_TIMING_HTS, sensor->mode.hts, &ret); + cci_write(sensor->regmap, OV2680_REG_TIMING_VTS, sensor->mode.vts, &ret); + cci_write(sensor->regmap, OV2680_REG_ISP_X_WIN, 0, &ret); + cci_write(sensor->regmap, OV2680_REG_ISP_Y_WIN, 0, &ret); + cci_write(sensor->regmap, OV2680_REG_X_INC, inc, &ret); + cci_write(sensor->regmap, OV2680_REG_Y_INC, inc, &ret); + cci_write(sensor->regmap, OV2680_REG_X_WIN, sensor->mode.h_output_size, &ret); + cci_write(sensor->regmap, OV2680_REG_Y_WIN, sensor->mode.v_output_size, &ret); + cci_write(sensor->regmap, OV2680_REG_FORMAT1, fmt1, &ret); + cci_write(sensor->regmap, OV2680_REG_FORMAT2, fmt2, &ret); - ret = ov_write_reg16(client, OV2680_HORIZONTAL_START_H, sensor->mode.h_start); - if (ret) - return ret; - - ret = ov_write_reg16(client, OV2680_VERTICAL_START_H, sensor->mode.v_start); - if (ret) - return ret; - - ret = ov_write_reg16(client, OV2680_HORIZONTAL_END_H, sensor->mode.h_end); - if (ret) - return ret; - - ret = ov_write_reg16(client, OV2680_VERTICAL_END_H, sensor->mode.v_end); - if (ret) - return ret; - - ret = ov_write_reg16(client, OV2680_HORIZONTAL_OUTPUT_SIZE_H, - sensor->mode.h_output_size); - if (ret) - return ret; - - ret = ov_write_reg16(client, OV2680_VERTICAL_OUTPUT_SIZE_H, - sensor->mode.v_output_size); - if (ret) - return ret; - - ret = ov_write_reg16(client, OV2680_HTS, sensor->mode.hts); - if (ret) - return ret; - - ret = ov_write_reg16(client, OV2680_VTS, sensor->mode.vts); - if (ret) - return ret; - - ret = ov_write_reg16(client, OV2680_ISP_X_WIN, 0); - if (ret) - return ret; - - ret = ov_write_reg16(client, OV2680_ISP_Y_WIN, 0); - if (ret) - return ret; - - ret = ov_write_reg8(client, OV2680_X_INC, inc); - if (ret) - return ret; - - ret = ov_write_reg8(client, OV2680_Y_INC, inc); - if (ret) - return ret; - - ret = ov_write_reg16(client, OV2680_X_WIN, sensor->mode.h_output_size); - if (ret) - return ret; - - ret = ov_write_reg16(client, OV2680_Y_WIN, sensor->mode.v_output_size); - if (ret) - return ret; - - ret = ov_write_reg8(client, OV2680_REG_FORMAT1, fmt1); - if (ret) - return ret; - - ret = ov_write_reg8(client, OV2680_REG_FORMAT2, fmt2); - if (ret) - return ret; - - return 0; + return ret; } static int ov2680_set_fmt(struct v4l2_subdev *sd, @@ -478,35 +446,25 @@ static int ov2680_init_cfg(struct v4l2_subdev *sd, return ov2680_set_fmt(sd, sd_state, &fmt); } -static int ov2680_detect(struct i2c_client *client) +static int ov2680_detect(struct ov2680_dev *sensor) { - struct i2c_adapter *adapter = client->adapter; - u32 high, low; - int ret; - u16 id; - u8 revision; + u32 chip_id, rev; + int ret = 0; - if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) - return -ENODEV; - - ret = ov_read_reg8(client, OV2680_SC_CMMN_CHIP_ID_H, &high); - if (ret) { - dev_err(&client->dev, "sensor_id_high = 0x%x\n", high); - return -ENODEV; - } - ret = ov_read_reg8(client, OV2680_SC_CMMN_CHIP_ID_L, &low); - id = ((((u16)high) << 8) | (u16)low); - - if (id != OV2680_ID) { - dev_err(&client->dev, "sensor ID error 0x%x\n", id); + cci_read(sensor->regmap, OV2680_REG_CHIP_ID, &chip_id, &ret); + cci_read(sensor->regmap, OV2680_REG_SC_CMMN_SUB_ID, &rev, &ret); + if (ret < 0) { + dev_err(sensor->dev, "failed to read chip id\n"); return -ENODEV; } - ret = ov_read_reg8(client, OV2680_SC_CMMN_SUB_ID, &high); - revision = (u8)high & 0x0f; + if (chip_id != OV2680_CHIP_ID) { + dev_err(sensor->dev, "chip id: 0x%04x does not match expected 0x%04x\n", + chip_id, OV2680_CHIP_ID); + return -ENODEV; + } - dev_info(&client->dev, "sensor_revision id = 0x%x, rev= %d\n", - id, revision); + dev_info(sensor->dev, "sensor_revision id = 0x%x, rev= %d\n", chip_id, rev & 0x0f); return 0; } @@ -538,11 +496,11 @@ static int ov2680_s_stream(struct v4l2_subdev *sd, int enable) if (ret) goto error_power_down; - ret = ov_write_reg8(client, OV2680_SW_STREAM, OV2680_START_STREAMING); + ret = cci_write(sensor->regmap, OV2680_REG_STREAM_CTRL, 1, NULL); if (ret) goto error_power_down; } else { - ov_write_reg8(client, OV2680_SW_STREAM, OV2680_STOP_STREAMING); + cci_write(sensor->regmap, OV2680_REG_STREAM_CTRL, 0, NULL); pm_runtime_put(sensor->sd.dev); } @@ -563,6 +521,7 @@ static int ov2680_s_stream(struct v4l2_subdev *sd, int enable) static int ov2680_s_config(struct v4l2_subdev *sd) { + struct ov2680_dev *sensor = to_ov2680_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); int ret; @@ -573,7 +532,7 @@ static int ov2680_s_config(struct v4l2_subdev *sd) } /* config & detect sensor */ - ret = ov2680_detect(client); + ret = ov2680_detect(sensor); if (ret) dev_err(&client->dev, "ov2680_detect err s_config.\n"); @@ -586,7 +545,7 @@ static int ov2680_g_frame_interval(struct v4l2_subdev *sd, struct v4l2_subdev_frame_interval *interval) { interval->interval.numerator = 1; - interval->interval.denominator = OV2680_FPS; + interval->interval.denominator = OV2680_FRAME_RATE; return 0; } @@ -638,7 +597,7 @@ static int ov2680_enum_frame_interval(struct v4l2_subdev *sd, return -EINVAL; fie->interval.numerator = 1; - fie->interval.denominator = OV2680_FPS; + fie->interval.denominator = OV2680_FRAME_RATE; return 0; } @@ -738,9 +697,13 @@ static int ov2680_probe(struct i2c_client *client) if (!sensor) return -ENOMEM; + sensor->regmap = cci_regmap_init_i2c(client, 16); + if (IS_ERR(sensor->regmap)) + return PTR_ERR(sensor->regmap); + mutex_init(&sensor->lock); - sensor->client = client; + sensor->dev = &client->dev; v4l2_i2c_subdev_init(&sensor->sd, client, &ov2680_ops); /* diff --git a/drivers/staging/media/atomisp/i2c/ov2680.h b/drivers/staging/media/atomisp/i2c/ov2680.h index d032af245674..d547846c2d13 100644 --- a/drivers/staging/media/atomisp/i2c/ov2680.h +++ b/drivers/staging/media/atomisp/i2c/ov2680.h @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -44,75 +45,12 @@ /* 1704 * 1294 * 30fps = 66MHz pixel clock */ #define OV2680_PIXELS_PER_LINE 1704 #define OV2680_LINES_PER_FRAME 1294 -#define OV2680_FPS 30 + #define OV2680_SKIP_FRAMES 3 /* If possible send 16 extra rows / lines to the ISP as padding */ #define OV2680_END_MARGIN 16 -#define OV2680_FOCAL_LENGTH_NUM 334 /*3.34mm*/ - -#define OV2680_INTEGRATION_TIME_MARGIN 8 -#define OV2680_ID 0x2680 - -/* - * OV2680 System control registers - */ -#define OV2680_SW_SLEEP 0x0100 -#define OV2680_SW_RESET 0x0103 -#define OV2680_SW_STREAM 0x0100 - -#define OV2680_SC_CMMN_CHIP_ID_H 0x300A -#define OV2680_SC_CMMN_CHIP_ID_L 0x300B -#define OV2680_SC_CMMN_SCCB_ID 0x302B /* 0x300C*/ -#define OV2680_SC_CMMN_SUB_ID 0x302A /* process, version*/ - -#define OV2680_GROUP_ACCESS 0x3208 /*Bit[7:4] Group control, Bit[3:0] Group ID*/ - -#define OV2680_REG_EXPOSURE_PK_HIGH 0x3500 -#define OV2680_REG_GAIN_PK 0x350a - -#define OV2680_REG_SENSOR_CTRL_0A 0x370a - -#define OV2680_HORIZONTAL_START_H 0x3800 /* Bit[11:8] */ -#define OV2680_HORIZONTAL_START_L 0x3801 /* Bit[7:0] */ -#define OV2680_VERTICAL_START_H 0x3802 /* Bit[11:8] */ -#define OV2680_VERTICAL_START_L 0x3803 /* Bit[7:0] */ -#define OV2680_HORIZONTAL_END_H 0x3804 /* Bit[11:8] */ -#define OV2680_HORIZONTAL_END_L 0x3805 /* Bit[7:0] */ -#define OV2680_VERTICAL_END_H 0x3806 /* Bit[11:8] */ -#define OV2680_VERTICAL_END_L 0x3807 /* Bit[7:0] */ -#define OV2680_HORIZONTAL_OUTPUT_SIZE_H 0x3808 /* Bit[11:8] */ -#define OV2680_HORIZONTAL_OUTPUT_SIZE_L 0x3809 /* Bit[7:0] */ -#define OV2680_VERTICAL_OUTPUT_SIZE_H 0x380a /* Bit[11:8] */ -#define OV2680_VERTICAL_OUTPUT_SIZE_L 0x380b /* Bit[7:0] */ -#define OV2680_HTS 0x380c -#define OV2680_VTS 0x380e -#define OV2680_ISP_X_WIN 0x3810 -#define OV2680_ISP_Y_WIN 0x3812 -#define OV2680_X_INC 0x3814 -#define OV2680_Y_INC 0x3815 - -#define OV2680_FRAME_OFF_NUM 0x4202 - -/*Flip/Mirror*/ -#define OV2680_REG_FORMAT1 0x3820 -#define OV2680_REG_FORMAT2 0x3821 - -#define OV2680_MWB_RED_GAIN_H 0x5004/*0x3400*/ -#define OV2680_MWB_GREEN_GAIN_H 0x5006/*0x3402*/ -#define OV2680_MWB_BLUE_GAIN_H 0x5008/*0x3404*/ -#define OV2680_MWB_GAIN_MAX 0x0fff - -#define OV2680_REG_ISP_CTRL00 0x5080 - -#define OV2680_X_WIN 0x5704 -#define OV2680_Y_WIN 0x5706 -#define OV2680_WIN_CONTROL 0x5708 - -#define OV2680_START_STREAMING 0x01 -#define OV2680_STOP_STREAMING 0x00 - /* * ov2680 device structure. */ @@ -121,7 +59,8 @@ struct ov2680_dev { struct media_pad pad; /* Protect against concurrent changes to controls */ struct mutex lock; - struct i2c_client *client; + struct device *dev; + struct regmap *regmap; struct gpio_desc *powerdown; struct fwnode_handle *ep_fwnode; bool is_streaming; @@ -173,7 +112,7 @@ static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl) return &sensor->sd; } -static struct ov2680_reg const ov2680_global_setting[] = { +static const struct reg_sequence ov2680_global_setting[] = { /* MIPI PHY, 0x10 -> 0x1c enable bp_c_hs_en_lat and bp_d_hs_en_lat */ {0x3016, 0x1c}, @@ -242,8 +181,6 @@ static struct ov2680_reg const ov2680_global_setting[] = { /* DPC THRE RATIO 0x04 (4) -> 0x00 (0) */ {0x5792, 0x00}, - - {} }; #endif From patchwork Tue Jun 6 16:58:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 92356 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1q6a1U-00GO7Q-Si; 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Tue, 06 Jun 2023 12:58:15 -0400 X-MC-Unique: FDA7Hr4sOyi28AXYGCo9MQ-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 91F181C0A581; Tue, 6 Jun 2023 16:58:14 +0000 (UTC) Received: from x1.nl (unknown [10.39.192.155]) by smtp.corp.redhat.com (Postfix) with ESMTP id A0CD8492B00; Tue, 6 Jun 2023 16:58:13 +0000 (UTC) From: Hans de Goede To: Laurent Pinchart , Sakari Ailus Cc: Hans de Goede , Mauro Carvalho Chehab , Andy Shevchenko , linux-media@vger.kernel.org Subject: [PATCH 3/3] media: Remove ov_16bit_addr_reg_helpers.h Date: Tue, 6 Jun 2023 18:58:08 +0200 Message-Id: <20230606165808.70751-4-hdegoede@redhat.com> In-Reply-To: <20230606165808.70751-1-hdegoede@redhat.com> References: <20230606165808.70751-1-hdegoede@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.9 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -4.8 (----) X-LSpam-Report: No, score=-4.8 required=5.0 tests=BAYES_00=-1.9,DKIMWL_WL_HIGH=0.001,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_MED=-2.3 autolearn=ham autolearn_force=no The helpers in this header are not used anywhere anymore, they have been superseded by the new CCI register access helpers. Signed-off-by: Hans de Goede Reviewed-by: Laurent Pinchart --- include/media/ov_16bit_addr_reg_helpers.h | 92 ----------------------- 1 file changed, 92 deletions(-) delete mode 100644 include/media/ov_16bit_addr_reg_helpers.h diff --git a/include/media/ov_16bit_addr_reg_helpers.h b/include/media/ov_16bit_addr_reg_helpers.h deleted file mode 100644 index 1c60a50bd795..000000000000 --- a/include/media/ov_16bit_addr_reg_helpers.h +++ /dev/null @@ -1,92 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * I2C register access helpers for Omnivision OVxxxx image sensors which expect - * a 16 bit register address in big-endian format and which have 1-3 byte - * wide registers, in big-endian format (for the higher width registers). - * - * Based on the register helpers from drivers/media/i2c/ov2680.c which is: - * Copyright (C) 2018 Linaro Ltd - */ -#ifndef __OV_16BIT_ADDR_REG_HELPERS_H -#define __OV_16BIT_ADDR_REG_HELPERS_H - -#include -#include -#include - -static inline int ov_read_reg(struct i2c_client *client, u16 reg, - unsigned int len, u32 *val) -{ - u8 addr_buf[2], data_buf[4] = { }; - struct i2c_msg msgs[2]; - int ret; - - if (len > 4) - return -EINVAL; - - put_unaligned_be16(reg, addr_buf); - - msgs[0].addr = client->addr; - msgs[0].flags = 0; - msgs[0].len = ARRAY_SIZE(addr_buf); - msgs[0].buf = addr_buf; - - msgs[1].addr = client->addr; - msgs[1].flags = I2C_M_RD; - msgs[1].len = len; - msgs[1].buf = &data_buf[4 - len]; - - ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); - if (ret != ARRAY_SIZE(msgs)) { - dev_err(&client->dev, "read error: reg=0x%4x: %d\n", reg, ret); - return -EIO; - } - - *val = get_unaligned_be32(data_buf); - - return 0; -} - -#define ov_read_reg8(s, r, v) ov_read_reg(s, r, 1, v) -#define ov_read_reg16(s, r, v) ov_read_reg(s, r, 2, v) -#define ov_read_reg24(s, r, v) ov_read_reg(s, r, 3, v) - -static inline int ov_write_reg(struct i2c_client *client, u16 reg, - unsigned int len, u32 val) -{ - u8 buf[6]; - int ret; - - if (len > 4) - return -EINVAL; - - put_unaligned_be16(reg, buf); - put_unaligned_be32(val << (8 * (4 - len)), buf + 2); - ret = i2c_master_send(client, buf, len + 2); - if (ret != len + 2) { - dev_err(&client->dev, "write error: reg=0x%4x: %d\n", reg, ret); - return -EIO; - } - - return 0; -} - -#define ov_write_reg8(s, r, v) ov_write_reg(s, r, 1, v) -#define ov_write_reg16(s, r, v) ov_write_reg(s, r, 2, v) -#define ov_write_reg24(s, r, v) ov_write_reg(s, r, 3, v) - -static inline int ov_update_reg(struct i2c_client *client, u16 reg, u8 mask, u8 val) -{ - u32 readval; - int ret; - - ret = ov_read_reg8(client, reg, &readval); - if (ret < 0) - return ret; - - val = (readval & ~mask) | (val & mask); - - return ov_write_reg8(client, reg, val); -} - -#endif