From patchwork Mon Oct 9 13:09:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 95657 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1qpq1e-00AhXp-F0; Mon, 09 Oct 2023 13:10:22 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376852AbjJINKU (ORCPT + 1 other); Mon, 9 Oct 2023 09:10:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1376797AbjJINKM (ORCPT ); Mon, 9 Oct 2023 09:10:12 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90435C5; Mon, 9 Oct 2023 06:10:09 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 399D9tSP067961; Mon, 9 Oct 2023 08:09:55 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1696856995; bh=5xRmA39JDsFhGm4qLUOCFV3dYHAJ5qXMdjUD4ivBnbU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=HO0w0sLRSKLt4pAD6hO1XFIBXflLGy4GDR9amEkyf/4SlsLQNLJkWeRj/Nh1MfPxz 5GIRNMdQkbajlm3qtz+J5OqhX+gX3Wse2mg2nWsVYNZ8GfqPFoHWsb6cLe6l6fqFYK XY6tXr5UXk1qibKGOP1oL/8Ya1UPaxMk9c1966OM= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 399D9teU077039 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 9 Oct 2023 08:09:55 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 9 Oct 2023 08:09:55 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 9 Oct 2023 08:09:55 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 399D9s0l118038; Mon, 9 Oct 2023 08:09:55 -0500 From: Jai Luthra To: Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sakari Ailus , Tomi Valkeinen CC: , , , , Laurent Pinchart , Mauro Carvalho Chehab , Maxime Ripard , , Benoit Parrot , Vaishnav Achath , Vignesh Raghavendra , , , , , Martyn Welch , Julien Massot Subject: [PATCH v10 09/13] media: cadence: csi2rx: Fix stream data configuration Date: Mon, 9 Oct 2023 18:39:35 +0530 Message-ID: <20231009-upstream_csi-v10-9-330aaed24c5d@ti.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231009-upstream_csi-v10-0-330aaed24c5d@ti.com> References: <20231009-upstream_csi-v10-0-330aaed24c5d@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2178; i=j-luthra@ti.com; h=from:subject:message-id; bh=rWhMSf+q3LWOfilXHfNOyLHKZTsa4nFF2tGubRsc2Js=; b=owEBbQKS/ZANAwAIAUPekfkkmnFFAcsmYgBlI/ssHTbgeHRwXjG64y9LWLkV2aafsEpi2t0j1 75jF26bX9WJAjMEAAEIAB0WIQRN4NgY5dV16NRar8VD3pH5JJpxRQUCZSP7LAAKCRBD3pH5JJpx RfeXEAC39aSNwDNaFw8qNp8F4b6Gcr6ESVZsKxqhdS0So68tv74391OHuVCKzjNf2Su+R/Ju3u0 gpbwD+MHj7hHX6m60bKveGGD+iLN7e+XPWLWSoUIraT/k2sTlxZj4os9cNx2jFClcBccYXhGR+h PoGfM9gq55kmpXuE9TuRE2DsqKlaFQJUENqqTC1ywwyfttqqIOB8BhUWyRZ+2gJ5cqsMdy9x0U2 GDGaFYI1243fopq0nZolOK3t1LJl5MNGzauvv6LqMm3/evH6Z99HJkbbrPDG7LLTLNTwI4TcPVg 0EdTSHdXljTOKZD/tpqEINqMIOeHyVDM/TcFsKNplaMkIBEX/OQrD6cdwIv5B7I74mS2Itav/T6 3ztAuNipZQs9SWKq+VgtXCghCC2dExzv0SDAcNj0FN9UKsRrfdUzj+k46NtdlWrHm2l14R2d18k CU3Y+oy5FXbpHhSNa2M96XBN6q0fNpb7QxhiOL0up0ekbP4Sn6v86jxyTOy6W+C9lK2cgLe9+WN ovI654z+agGtfPSvB98oyOf/Nn7aFxcE3GzuI1DntOu6iF+HPLWZkxKrQf7xYc1jECXmkyGZa7Y svyW1P6it9VPe3jz9bQHzoapGgBloRNqsP/YGVON5hfkUAUsfUpq6TdvEZtOjFugIU+KXCvsTPa EB85EduQXPRBiFw== X-Developer-Key: i=j-luthra@ti.com; a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -4.8 (----) X-LSpam-Report: No, score=-4.8 required=5.0 tests=BAYES_00=-1.9,DKIMWL_WL_HIGH=0.001,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_MED=-2.3 autolearn=ham autolearn_force=no From: Pratyush Yadav Firstly, there is no VC_EN bit present in the STREAM_DATA_CFG register. Bit 31 is part of the VL_SELECT field. Remove it completely. Secondly, it makes little sense to enable ith virtual channel for ith stream. Sure, there might be a use-case that demands it. But there might also be a use case that demands all streams to use the 0th virtual channel. Prefer this case over the former because it is less arbitrary and also makes it very clear what the limitations of the current driver is instead of giving a false impression that multiple virtual channels are supported. Signed-off-by: Pratyush Yadav Tested-by: Julien Massot Reviewed-by: Laurent Pinchart Reviewed-by: Tomi Valkeinen Reviewed-by: Maxime Ripard Signed-off-by: Jai Luthra --- drivers/media/platform/cadence/cdns-csi2rx.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/cadence/cdns-csi2rx.c b/drivers/media/platform/cadence/cdns-csi2rx.c index 230c627ef1f4..812f31dfaab1 100644 --- a/drivers/media/platform/cadence/cdns-csi2rx.c +++ b/drivers/media/platform/cadence/cdns-csi2rx.c @@ -49,7 +49,6 @@ #define CSI2RX_STREAM_STATUS_RDY BIT(31) #define CSI2RX_STREAM_DATA_CFG_REG(n) (CSI2RX_STREAM_BASE(n) + 0x008) -#define CSI2RX_STREAM_DATA_CFG_EN_VC_SELECT BIT(31) #define CSI2RX_STREAM_DATA_CFG_VC_SELECT(n) BIT((n) + 16) #define CSI2RX_STREAM_CFG_REG(n) (CSI2RX_STREAM_BASE(n) + 0x00c) @@ -271,8 +270,11 @@ static int csi2rx_start(struct csi2rx_priv *csi2rx) writel(CSI2RX_STREAM_CFG_FIFO_MODE_LARGE_BUF, csi2rx->base + CSI2RX_STREAM_CFG_REG(i)); - writel(CSI2RX_STREAM_DATA_CFG_EN_VC_SELECT | - CSI2RX_STREAM_DATA_CFG_VC_SELECT(i), + /* + * Enable one virtual channel. When multiple virtual channels + * are supported this will have to be changed. + */ + writel(CSI2RX_STREAM_DATA_CFG_VC_SELECT(0), csi2rx->base + CSI2RX_STREAM_DATA_CFG_REG(i)); writel(CSI2RX_STREAM_CTRL_START,