From patchwork Fri Jul 14 01:50:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuji Ishikawa X-Patchwork-Id: 93139 X-Patchwork-Delegate: hverkuil@xs4all.nl Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1qK83X-00Ft4f-B1; Fri, 14 Jul 2023 01:57:16 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234619AbjGNB5M (ORCPT + 1 other); Thu, 13 Jul 2023 21:57:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234558AbjGNB5E (ORCPT ); Thu, 13 Jul 2023 21:57:04 -0400 Received: from mo-csw.securemx.jp (mo-csw1120.securemx.jp [210.130.202.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 200442700; Thu, 13 Jul 2023 18:56:59 -0700 (PDT) Received: by mo-csw.securemx.jp (mx-mo-csw1120) id 36E1uMNa1073961; Fri, 14 Jul 2023 10:56:22 +0900 X-Iguazu-Qid: 2rWhW3wiOPi8rJLKeQ X-Iguazu-QSIG: v=2; s=0; t=1689299782; q=2rWhW3wiOPi8rJLKeQ; m=m17nmGlotgXH8iyWhmT40GKkAJum90bq0w1QlwRt/AI= Received: from imx12-a.toshiba.co.jp ([38.106.60.135]) by relay.securemx.jp (mx-mr1122) id 36E1uJFJ2651959 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Fri, 14 Jul 2023 10:56:20 +0900 X-SA-MID: 3648359 From: Yuji Ishikawa To: Hans Verkuil , Sakari Ailus , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nobuhiro Iwamatsu , Mark Brown , Yuji Ishikawa Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 1/5] dt-bindings: media: platform: visconti: Add Toshiba Visconti Video Input Interface Date: Fri, 14 Jul 2023 10:50:55 +0900 X-TSB-HOP2: ON Message-Id: <20230714015059.18775-2-yuji2.ishikawa@toshiba.co.jp> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230714015059.18775-1-yuji2.ishikawa@toshiba.co.jp> References: <20230714015059.18775-1-yuji2.ishikawa@toshiba.co.jp> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -4.7 (----) X-LSpam-Report: No, score=-4.7 required=5.0 tests=BAYES_00=-1.9,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_MED=-2.3 autolearn=ham autolearn_force=no Adds the Device Tree binding documentation that allows to describe the Video Input Interface found in Toshiba Visconti SoCs. Signed-off-by: Yuji Ishikawa Reviewed-by: Nobuhiro Iwamatsu --- Changelog v2: - no change Changelog v3: - no change Changelog v4: - fix style problems at the v3 patch - remove "index" member - update example Changelog v5: - no change Changelog v6: - add register definition of BUS-IF and MPU Changelog v7: - remove trailing "bindings" from commit header message - remove trailing "Device Tree Bindings" from title - fix text wrapping of description - change compatible to visconti5-viif - explicitly define allowed properties for port::endpoint .../bindings/media/toshiba,visconti-viif.yaml | 108 ++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/toshiba,visconti-viif.yaml diff --git a/Documentation/devicetree/bindings/media/toshiba,visconti-viif.yaml b/Documentation/devicetree/bindings/media/toshiba,visconti-viif.yaml new file mode 100644 index 000000000..8377f75b3 --- /dev/null +++ b/Documentation/devicetree/bindings/media/toshiba,visconti-viif.yaml @@ -0,0 +1,108 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/toshiba,visconti-viif.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba Visconti5 SoC Video Input Interface + +maintainers: + - Nobuhiro Iwamatsu + +description: |- + Toshiba Visconti5 SoC Video Input Interface (VIIF) receives MIPI CSI2 video + stream, processes the stream with image signal processors (L1ISP, L2ISP), + then stores pictures to main memory. + +properties: + compatible: + const: toshiba,visconti5-viif + + reg: + items: + - description: registers for capture control + - description: registers for CSI2 receiver control + - description: registers for bus interface unit control + - description: registers for Memory Protection Unit + + interrupts: + items: + - description: Sync Interrupt + - description: Status (Error) Interrupt + - description: CSI2 Receiver Interrupt + - description: L1ISP Interrupt + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: Input port, single endpoint describing the CSI-2 transmitter. + + properties: + endpoint: + $ref: video-interfaces.yaml# + additionalProperties: false + + required: ["bus-type", "clock-noncontinuous", "link-frequencies", "remote-endpoint"] + + properties: + data-lanes: + description: VIIF supports 2 or 4 data lanes + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 4 + items: + minimum: 1 + maximum: 4 + + clock-lanes: + description: VIIF supports 1 clock lane + const: 0 + + bus-type: true + clock-noncontinuous: true + link-frequencies: true + remote-endpoint: true + +required: + - compatible + - reg + - interrupts + - port + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + viif@1c000000 { + compatible = "toshiba,visconti5-viif"; + reg = <0 0x1c000000 0 0x6000>, + <0 0x1c008000 0 0x400>, + <0 0x1c00E000 0 0x1000>, + <0 0x2417A000 0 0x1000>; + interrupts = , + , + , + ; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi_in0: endpoint { + remote-endpoint = <&imx219_out0>; + bus-type = <4>; + data-lanes = <1 2>; + clock-lanes = <0>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <456000000>; + }; + }; + }; + };