From patchwork Tue Feb 2 14:56:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Stuebner X-Patchwork-Id: 71253 Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1l6x8f-007dSA-Gm; Tue, 02 Feb 2021 14:58:46 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234906AbhBBO57 (ORCPT + 1 other); Tue, 2 Feb 2021 09:57:59 -0500 Received: from gloria.sntech.de ([185.11.138.130]:48860 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234890AbhBBO5o (ORCPT ); Tue, 2 Feb 2021 09:57:44 -0500 Received: from ip5f5aa64a.dynamic.kabel-deutschland.de ([95.90.166.74] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1l6x6m-00020V-Iv; Tue, 02 Feb 2021 15:56:48 +0100 From: Heiko Stuebner To: dri-devel@lists.freedesktop.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, hjc@rock-chips.com, heiko@sntech.de, robh+dt@kernel.org, sebastian.fricke@posteo.net, linux-media@vger.kernel.org, dafna.hirschfeld@collabora.com, helen.koike@collabora.com, ezequiel@collabora.com, cmuellner@linux.com, Heiko Stuebner Subject: [PATCH 2/6] dt-bindings: display: rockchip-dsi: add optional #phy-cells property Date: Tue, 2 Feb 2021 15:56:28 +0100 Message-Id: <20210202145632.1263136-3-heiko@sntech.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210202145632.1263136-1-heiko@sntech.de> References: <20210202145632.1263136-1-heiko@sntech.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -2.4 (--) X-LSpam-Report: No, score=-2.4 required=5.0 tests=BAYES_00=-1.9,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1 autolearn=ham autolearn_force=no From: Heiko Stuebner The Rockchip DSI controller on some SoCs also controls a bidrectional dphy, which would be connected to an Image Signal Processor as a phy in the rx configuration. So allow a #phy-cells property for the dsi controller. Signed-off-by: Heiko Stuebner Acked-by: Rob Herring --- .../bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt index 151be3bba06f..39792f051d2d 100644 --- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt +++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt @@ -23,6 +23,7 @@ Required properties: Optional properties: - phys: from general PHY binding: the phandle for the PHY device. - phy-names: Should be "dphy" if phys references an external phy. +- #phy-cells: Defined when used as ISP phy, should be 0. - power-domains: a phandle to mipi dsi power domain node. - resets: list of phandle + reset specifier pairs, as described in [3]. - reset-names: string reset name, must be "apb".