From patchwork Fri May 18 09:27:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 49655 Received: from vger.kernel.org ([209.132.180.67]) by www.linuxtv.org with esmtp (Exim 4.84_2) (envelope-from ) id 1fJbhM-0000wK-Jx; Fri, 18 May 2018 09:29:16 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752953AbeERJ3M (ORCPT + 1 other); Fri, 18 May 2018 05:29:12 -0400 Received: from mail-wr0-f194.google.com ([209.85.128.194]:41073 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753334AbeERJ2c (ORCPT ); Fri, 18 May 2018 05:28:32 -0400 Received: by mail-wr0-f194.google.com with SMTP id w15-v6so909540wrp.8 for ; Fri, 18 May 2018 02:28:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+GivAHxNif/Lo/d+/LTBZpU07EAf+f1M3F3+8RpbDnE=; b=hyB3xzceNi8ZJKcqJNXfrHKJncAeUa48S1nBhNFKMfW5wK/rOOzAQ8NkVe39+F1qjj 3u03gJ9OCSFEfCFcgeJDGWw88G38fu5Jt/MjZqvPlqmfz87axxGNgBG6K5a+g+Oj8GbA DwaIzhdMFhwpZRDDAI/iVNRBHD10ld7zodG0c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+GivAHxNif/Lo/d+/LTBZpU07EAf+f1M3F3+8RpbDnE=; b=JdGvH7MsXFCTwU4yJpUPFXIgiWuAHSzRycv8GR29fv9pIMdMTnEUe7+BhaxjJ8t8sg SevvURDft01uPKDZO4ApGnedgD4Wbr+HOjSRZ3LeRwlI1HcgRPtF3zi+vLhhLJTO8XkR f4ybxUB4iXp1G8heL9zH9I0oT9zgUbpYrumOla+5LZEpgvtfskNVl3NAxJM/BD0VDbkn PDhe3zJzs56fY4ix/v0iTqelFrq7g7tmns/PLlrAi8Svi8WkThKfM6LV6Q3vs+uE9/kP mP7GHkuapK1GFOyp8Rm2acznbx4fiYH3+PS2aEKnFnNEuCiHO6B4W/0KbYJoRv+0J0aF TVWA== X-Gm-Message-State: ALKqPwdSJMCMpR4qrYUrsbtsAQyL+patrfypOw7NaRwft95M3wvZggX+ kVhjqRdlQ7UtCjPHISD+GB7r7g== X-Google-Smtp-Source: AB8JxZrKnBpaC75hcsQGkeOt/CQR7w8RK/qWEKi3tVBS11cgj+cez8ZkS2mq5CcRnYd0es/tRoJc7Q== X-Received: by 2002:adf:adf0:: with SMTP id w103-v6mr7513104wrc.101.1526635711715; Fri, 18 May 2018 02:28:31 -0700 (PDT) Received: from arch-late.local (a109-49-46-234.cpe.netcabo.pt. [109.49.46.234]) by smtp.gmail.com with ESMTPSA id d125-v6sm6544514wmd.24.2018.05.18.02.28.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 May 2018 02:28:30 -0700 (PDT) From: Rui Miguel Silva To: mchehab@kernel.org, sakari.ailus@linux.intel.com, Steve Longerbeam , Philipp Zabel , Rob Herring Cc: linux-media@vger.kernel.org, devel@driverdev.osuosl.org, Shawn Guo , Fabio Estevam , devicetree@vger.kernel.org, Greg Kroah-Hartman , Ryan Harkin , linux-clk@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v5 04/12] clk: imx7d: reset parent for mipi csi root Date: Fri, 18 May 2018 10:27:58 +0100 Message-Id: <20180518092806.3829-5-rui.silva@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180518092806.3829-1-rui.silva@linaro.org> References: <20180518092806.3829-1-rui.silva@linaro.org> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org To guarantee that we do not get Overflow in image FIFO the outer bandwidth has to be faster than inputer bandwidth. For that it must be possible to set a faster frequency clock. So set new parent to sys_pfd3 clock for the mipi csi block. Acked-by: Shawn Guo Signed-off-by: Rui Miguel Silva --- drivers/clk/imx/clk-imx7d.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index f7f4db2e6fa6..27877d05faa2 100644 --- a/drivers/clk/imx/clk-imx7d.c +++ b/drivers/clk/imx/clk-imx7d.c @@ -891,6 +891,8 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) clk_set_parent(clks[IMX7D_PLL_AUDIO_MAIN_BYPASS], clks[IMX7D_PLL_AUDIO_MAIN]); clk_set_parent(clks[IMX7D_PLL_VIDEO_MAIN_BYPASS], clks[IMX7D_PLL_VIDEO_MAIN]); + clk_set_parent(clks[IMX7D_MIPI_CSI_ROOT_SRC], clks[IMX7D_PLL_SYS_PFD3_CLK]); + /* use old gpt clk setting, gpt1 root clk must be twice as gpt counter freq */ clk_set_parent(clks[IMX7D_GPT1_ROOT_SRC], clks[IMX7D_OSC_24M_CLK]);