diff -r -U 3 tm6000.old/tm6000-core.c tm6000/tm6000-core.c
--- tm6000.old/tm6000-core.c	2011-08-29 14:16:01.000000000 +1000
+++ tm6000/tm6000-core.c	2011-11-08 02:31:48.000000000 +1000
@@ -640,11 +640,13 @@
 	if (dev->dev_type == TM6010) {
 		/* Audio crossbar setting, default SIF1 */
 		u8 areg_f0;
+		u8 areg_07 = 0x10;
 
 		switch (dev->rinput.amux) {
 		case TM6000_AMUX_SIF1:
 		case TM6000_AMUX_SIF2:
 			areg_f0 = 0x03;
+			areg_07 = 0x30;
 			break;
 		case TM6000_AMUX_ADC1:
 			areg_f0 = 0x00;
@@ -664,6 +666,9 @@
 		/* Set audio input crossbar */
 		tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
 							areg_f0, 0x0f);
+		/* Mux overflow workaround */
+		tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
+			areg_07, 0xf0);
 	} else {
 		u8 areg_eb;
 		/* Audio setting, default LINE1 */
diff -r -U 3 tm6000.old/tm6000-stds.c tm6000/tm6000-stds.c
--- tm6000.old/tm6000-stds.c	2011-08-29 14:16:01.000000000 +1000
+++ tm6000/tm6000-stds.c	2011-11-08 03:04:37.000000000 +1000
@@ -394,7 +394,14 @@
 		case V4L2_STD_SECAM_L:
 			areg_05 |= 0x00;
 			break;
-		case V4L2_STD_DK:
+		case V4L2_STD_SECAM_D:
+		case V4L2_STD_SECAM_K:
+		case V4L2_STD_SECAM_K1:
+		case V4L2_STD_SECAM_DK:
+		case V4L2_STD_PAL_D:
+		case V4L2_STD_PAL_D1:
+		case V4L2_STD_PAL_K:
+		case V4L2_STD_PAL_DK:
 			areg_05 |= 0x10;
 			break;
 		}
@@ -402,11 +409,23 @@
 	/* A2 */
 	case 1:
 		switch (dev->norm) {
-		case V4L2_STD_B:
-		case V4L2_STD_GH:
+		case V4L2_STD_PAL_B:
+		case V4L2_STD_PAL_B1:
+		case V4L2_STD_SECAM_B:
+		case V4L2_STD_PAL_G:
+		case V4L2_STD_PAL_H:
+		case V4L2_STD_SECAM_G:
+		case V4L2_STD_SECAM_H:
 			areg_05 = 0x05;
 			break;
-		case V4L2_STD_DK:
+		case V4L2_STD_SECAM_D:
+		case V4L2_STD_SECAM_K:
+		case V4L2_STD_SECAM_K1:
+		case V4L2_STD_SECAM_DK:
+		case V4L2_STD_PAL_D:
+		case V4L2_STD_PAL_D1:
+		case V4L2_STD_PAL_K:
+		case V4L2_STD_PAL_DK:
 			areg_05 = 0x09;
 			break;
 		}
@@ -414,11 +433,23 @@
 	/* NICAM */
 	case 2:
 		switch (dev->norm) {
-		case V4L2_STD_B:
-		case V4L2_STD_GH:
+		case V4L2_STD_PAL_B:
+		case V4L2_STD_PAL_B1:
+		case V4L2_STD_SECAM_B:
+		case V4L2_STD_PAL_G:
+		case V4L2_STD_PAL_H:
+		case V4L2_STD_SECAM_G:
+		case V4L2_STD_SECAM_H:
 			areg_05 = 0x07;
 			break;
-		case V4L2_STD_DK:
+		case V4L2_STD_SECAM_D:
+		case V4L2_STD_SECAM_K:
+		case V4L2_STD_SECAM_K1:
+		case V4L2_STD_SECAM_DK:
+		case V4L2_STD_PAL_D:
+		case V4L2_STD_PAL_D1:
+		case V4L2_STD_PAL_K:
+		case V4L2_STD_PAL_DK:
 			areg_05 = 0x06;
 			break;
 		case V4L2_STD_PAL_I:
@@ -435,7 +466,14 @@
 	case 3:
 		switch (dev->norm) {
 		/* DK3_A2 */
-		case V4L2_STD_DK:
+		case V4L2_STD_SECAM_D:
+		case V4L2_STD_SECAM_K:
+		case V4L2_STD_SECAM_K1:
+		case V4L2_STD_SECAM_DK:
+		case V4L2_STD_PAL_D:
+		case V4L2_STD_PAL_D1:
+		case V4L2_STD_PAL_K:
+		case V4L2_STD_PAL_DK:
 			areg_05 = 0x0b;
 			break;
 		/* Korea */
@@ -571,10 +609,16 @@
 		case TM6000_AMUX_ADC1:
 			tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
 				0x00, 0x0f);
+			/* Mux overflow workaround */
+			tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
+				0x10, 0xf0);
 			break;
 		case TM6000_AMUX_ADC2:
 			tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
 				0x08, 0x0f);
+			/* Mux overflow workaround */
+			tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
+				0x10, 0xf0);
 			break;
 		case TM6000_AMUX_SIF1:
 			reg_08_e2 |= 0x02;
@@ -584,6 +628,9 @@
 			tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3);
 			tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
 				0x02, 0x0f);
+			/* Mux overflow workaround */
+			tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
+				0x30, 0xf0);
 			break;
 		case TM6000_AMUX_SIF2:
 			reg_08_e2 |= 0x02;
@@ -593,6 +640,9 @@
 			tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf7);
 			tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
 				0x02, 0x0f);
+			/* Mux overflow workaround */
+			tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
+				0x30, 0xf0);
 			break;
 		default:
 			break;

Signed-off-by: Beholder Intl. Ltd. Dmitry Belimov <d.belimov@gmail.com>
