From patchwork Sat Jan 1 13:51:24 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Igor M. Liplianin" X-Patchwork-Id: 5403 Return-path: Envelope-to: mchehab@gaivota Delivery-date: Sat, 01 Jan 2011 12:02:35 -0200 Received: from mchehab by gaivota with local (Exim 4.72) (envelope-from ) id 1PZ22V-0004gX-EP for mchehab@gaivota; Sat, 01 Jan 2011 12:02:35 -0200 Received: from casper.infradead.org [85.118.1.10] by gaivota with IMAP (fetchmail-6.3.17) for (single-drop); Sat, 01 Jan 2011 12:02:35 -0200 (BRST) Received: from vger.kernel.org ([209.132.180.67]) by casper.infradead.org with esmtp (Exim 4.72 #1 (Red Hat Linux)) id 1PZ1uS-0000VU-IO; Sat, 01 Jan 2011 13:54:16 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752764Ab1AANxY (ORCPT + 1 other); Sat, 1 Jan 2011 08:53:24 -0500 Received: from mail-ew0-f46.google.com ([209.85.215.46]:55628 "EHLO mail-ew0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752593Ab1AANxH (ORCPT ); Sat, 1 Jan 2011 08:53:07 -0500 Received: by ewy5 with SMTP id 5so5644353ewy.19 for ; Sat, 01 Jan 2011 05:53:06 -0800 (PST) Received: by 10.213.7.136 with SMTP id d8mr12292557ebd.67.1293889986145; Sat, 01 Jan 2011 05:53:06 -0800 (PST) Received: from useri.localnet ([93.125.74.3]) by mx.google.com with ESMTPS id t5sm13115787eeh.8.2011.01.01.05.53.04 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sat, 01 Jan 2011 05:53:05 -0800 (PST) From: Abylay Ospan Date: Sat, 1 Jan 2011 15:51:24 +0200 Subject: [PATCH 16/18] Fix CI code for NetUP Dual DVB-T/C CI RF card To: mchehab@infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org MIME-Version: 1.0 Message-Id: <201101011551.24260.aospan@netup.ru> Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Sender: Mauro Carvalho Chehab CI reset takes several seconds on some CAM, so there is no need to lock mutex all that time. Also we need not to preserve CI's reset bits in CIBUSCTRL register, they are handled automatically by FPGA. Set it to 0 explicitly in order to not reset wrong CAM. Signed-off-by: Abylay Ospan --- drivers/media/video/cx23885/altera-ci.c | 14 ++++++++++---- 1 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/media/video/cx23885/altera-ci.c b/drivers/media/video/cx23885/altera-ci.c index 019797b..90147d6 100644 --- a/drivers/media/video/cx23885/altera-ci.c +++ b/drivers/media/video/cx23885/altera-ci.c @@ -283,7 +283,7 @@ int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot, netup_fpga_op_rw(inter, NETUP_CI_ADDR1, ((addr >> 7) & 0x7f), 0); store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD); - store &= 0x3f; + store &= 0x0f; store |= ((state->nr << 7) | (flag << 6)); netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, store, 0); @@ -340,19 +340,25 @@ int netup_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot) ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD); netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, - ret | (1 << (5 - state->nr)), 0); + (ret & 0xcf) | (1 << (5 - state->nr)), 0); + + mutex_unlock(&inter->fpga_mutex); for (;;) { mdelay(50); + + mutex_lock(&inter->fpga_mutex); + ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD); + mutex_unlock(&inter->fpga_mutex); + if ((ret & (1 << (5 - state->nr))) == 0) break; if (time_after(jiffies, t_out)) break; } - mutex_unlock(&inter->fpga_mutex); printk("%s: %d msecs\n", __func__, jiffies_to_msecs(jiffies + msecs_to_jiffies(9999) - t_out)); @@ -381,7 +387,7 @@ int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot) ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD); netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, - ret | (1 << (3 - state->nr)), 0); + (ret & 0x0f) | (1 << (3 - state->nr)), 0); mutex_unlock(&inter->fpga_mutex);