From patchwork Mon Oct 18 05:04:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dillon Min X-Patchwork-Id: 77847 X-Patchwork-Delegate: hverkuil@xs4all.nl Received: from vger.kernel.org ([23.128.96.18]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1mcKqa-007G8N-Ja; Mon, 18 Oct 2021 05:06:04 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230228AbhJRFIM (ORCPT + 1 other); Mon, 18 Oct 2021 01:08:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230156AbhJRFHw (ORCPT ); Mon, 18 Oct 2021 01:07:52 -0400 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C86A2C061765; Sun, 17 Oct 2021 22:05:40 -0700 (PDT) Received: by mail-pj1-x1033.google.com with SMTP id ez7-20020a17090ae14700b001a132a1679bso3772327pjb.0; Sun, 17 Oct 2021 22:05:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=iXB2wMbfBlH2biKh+fE/0gaM6DAJlWmRN1NRxvqyicc=; b=E4eumIEn+uqXfnyNgoZXaalpyJK/OU0q/ClkLmC40wmBpgXeWXprFGC5REdchD2nw9 ZuiBk782nA11w6CmeRH8YIXZm/lNTHtbPoVnCeqsHbH4KVrHyILndHDwlO3vyEkHQrtj 1aR/nm0902hAtrxEFuFLKb4KW4Xy4cTBi6yt11JMuCXQebknEQQdXlxnzVBZ1v5Yo9nE rADBE5h12u9JsnqfCYMOcQ+rswcYL+/nHSPvMgVFAa2VgyYgDNaOD1GYeqf1uqaMxNJu uzJZLrp5SzgL3kRRses3S1kHVk4gHWqdvqFU057aEDxH8TYpm0aeAxd9dhgkoGGt3qW1 Xt1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=iXB2wMbfBlH2biKh+fE/0gaM6DAJlWmRN1NRxvqyicc=; b=ZdaeyUO8WO5HfOm37sQ4KqkGUN2eyhT0DHTTF6CVO3dvIyKZDBbNhjyH/E2uAga5gR LI4oO0QviH5Apbh95YpOauENKECrIStwTAicf2gr+bCjDxodfqJXuKuTbGijzXxh2HwK Z5mQJ9hrUw3Sls4JiktWM42psMl1RiEPG+mY9N01wZZZQEvg5wT1oZi7yjAz74LpkOAx 0P13xVUlR/7ojZ1/fnVp09OG1uycKUG/nO63ULtY/F+FrhoMZktxrMymrjRLWddKdxAJ srq1aca3BANPzQ76AvJswrTf8xSExi3nDUYniYjmCe8yJSDglXS2hT5Z+88qKIHpl44j 3WHA== X-Gm-Message-State: AOAM530vTW64XVaV+5gZ7yn0L+rlY13zKo7kSnTyd/xt+9wxjR0Ezypu FP0YNZ6rIXd8QZPNRGRpnPE9WvVfERlQcQGN X-Google-Smtp-Source: ABdhPJx32o+U7oM1cKfETK1udGDRL1UyqJ5G26FYtM0/Fw/mpLXtpOiGGh5WyH+pLAnRo+fG75SCSQ== X-Received: by 2002:a17:90a:a085:: with SMTP id r5mr44801139pjp.8.1634533540342; Sun, 17 Oct 2021 22:05:40 -0700 (PDT) Received: from fmin-OptiPlex-7060.nreal.work ([137.59.103.165]) by smtp.gmail.com with ESMTPSA id c205sm11416625pfc.43.2021.10.17.22.05.35 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sun, 17 Oct 2021 22:05:40 -0700 (PDT) From: dillon.minfei@gmail.com To: mchehab@kernel.org, mchehab+huawei@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@collabora.com, gnurou@gmail.com, pihsun@chromium.org, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, gabriel.fernandez@st.com, gabriel.fernandez@foss.st.com Cc: patrice.chotard@foss.st.com, hugues.fruchet@foss.st.com, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Dillon Min Subject: [PATCH v5 09/10] clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell Date: Mon, 18 Oct 2021 13:04:47 +0800 Message-Id: <1634533488-25334-10-git-send-email-dillon.minfei@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1634533488-25334-1-git-send-email-dillon.minfei@gmail.com> References: <1634533488-25334-1-git-send-email-dillon.minfei@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-LSpam-Score: -4.8 (----) X-LSpam-Report: No, score=-4.8 required=5.0 tests=BAYES_00=-1.9,DKIM_SIGNED=0.1,DKIM_VALID=-0.1,DKIM_VALID_AU=-0.1,FREEMAIL_FORGED_FROMDOMAIN=0.001,FREEMAIL_FROM=0.001,HEADER_FROM_DIFFERENT_DOMAINS=0.5,MAILING_LIST_MULTI=-1,RCVD_IN_DNSWL_MED=-2.3 autolearn=ham autolearn_force=no From: Dillon Min stm32's clk driver register two ltdc gate clk to clk core by clk_hw_register_gate() and clk_hw_register_composite() first: 'stm32f429_gates[]', clk name is 'ltdc', which no user to use. second: 'stm32f429_aux_clk[]', clk name is 'lcd-tft', used by ltdc driver both of them point to the same offset of stm32's RCC register. after kernel enter console, clk core turn off ltdc's clk as 'stm32f429_gates[]' is no one to use. but, actually 'stm32f429_aux_clk[]' is in use. stm32f469/746/769 have the same issue, fix it. Fixes: daf2d117cbca ("clk: stm32f4: Add lcd-tft clock") Acked-by: Stephen Boyd Link: https://lore.kernel.org/linux-arm-kernel/1590564453-24499-7-git-send-email-dillon.minfei@gmail.com/ Link: https://lore.kernel.org/lkml/CAPTRvHkf0cK_4ZidM17rPo99gWDmxgqFt4CDUjqFFwkOeQeFDg@mail.gmail.com/ Signed-off-by: Dillon Min --- v5: no change. drivers/clk/clk-stm32f4.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index af46176ad053..473dfe632cc5 100644 --- a/drivers/clk/clk-stm32f4.c +++ b/drivers/clk/clk-stm32f4.c @@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] __initconst = { { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, }; static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { @@ -211,7 +210,6 @@ static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, }; static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { @@ -286,7 +284,6 @@ static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, }; static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { @@ -364,7 +361,6 @@ static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, { STM32F4_RCC_APB2ENR, 30, "mdio", "apb2_div" }, };