From patchwork Wed Jan 8 12:55:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 61075 Received: from vger.kernel.org ([209.132.180.67]) by www.linuxtv.org with esmtp (Exim 4.92) (envelope-from ) id 1ipAtN-0008rC-MZ; Wed, 08 Jan 2020 12:56:57 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728608AbgAHM5q (ORCPT + 1 other); Wed, 8 Jan 2020 07:57:46 -0500 Received: from esa3.microchip.iphmx.com ([68.232.153.233]:35612 "EHLO esa3.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726760AbgAHM5o (ORCPT ); Wed, 8 Jan 2020 07:57:44 -0500 Received-SPF: Pass (esa3.microchip.iphmx.com: domain of Claudiu.Beznea@microchip.com designates 198.175.253.82 as permitted sender) identity=mailfrom; client-ip=198.175.253.82; receiver=esa3.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="Claudiu.Beznea@microchip.com"; x-conformance=spf_only; x-record-type="v=spf1"; x-record-text="v=spf1 mx a:ushub1.microchip.com a:smtpout.microchip.com -exists:%{i}.spf.microchip.iphmx.com include:servers.mcsv.net include:mktomail.com include:spf.protection.outlook.com ~all" Received-SPF: None (esa3.microchip.iphmx.com: no sender authenticity information available from domain of postmaster@email.microchip.com) identity=helo; client-ip=198.175.253.82; receiver=esa3.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="postmaster@email.microchip.com"; x-conformance=spf_only Authentication-Results: esa3.microchip.iphmx.com; dkim=none (message not signed) header.i=none; spf=Pass smtp.mailfrom=Claudiu.Beznea@microchip.com; spf=None smtp.helo=postmaster@email.microchip.com; dmarc=pass (p=none dis=none) d=microchip.com IronPort-SDR: nQ9PI001eduTYtVNqrXLm4BgLJjGErbvBcs9jRgHx5KTNtFmjF/ceG71zm4pK1U85prd/WgfN1 ep7dGA+iYzOdTZ/BmpAW2Q2sLNAjX69BvM8pw4O4f1C/QLPgq60DxpvofcPumPGnimp7ojEtNf AGCpyCTUDnL39KMvGykVsvbO7wX48//F5Li94VascO+EygS8avzJ3i0MLYQGNvEJ4BmUze5Y+9 r8kDtK9sR20Azv1gksOF1cQON1+w3CtFp9ZYv1uXUZir6QUNTj6Zww31cNRPx9Og9kFfAsg0Ig 7/o= X-IronPort-AV: E=Sophos;i="5.69,410,1571727600"; d="scan'208";a="62569331" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Jan 2020 05:57:42 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 8 Jan 2020 05:57:36 -0700 Received: from m18063-ThinkPad-T460p.microchip.com (10.10.85.251) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Wed, 8 Jan 2020 05:57:28 -0700 From: Claudiu Beznea To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , Claudiu Beznea Subject: [PATCH 12/16] dt-bindings: spi_atmel: add microchip,sam9x60-spi Date: Wed, 8 Jan 2020 14:55:19 +0200 Message-ID: <1578488123-26127-13-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578488123-26127-1-git-send-email-claudiu.beznea@microchip.com> References: <1578488123-26127-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add microchip,sam9x60-spi to DT bindings documentation. Signed-off-by: Claudiu Beznea --- Documentation/devicetree/bindings/spi/spi_atmel.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/spi_atmel.txt b/Documentation/devicetree/bindings/spi/spi_atmel.txt index f99c733d75c1..5bb4a8f1df7a 100644 --- a/Documentation/devicetree/bindings/spi/spi_atmel.txt +++ b/Documentation/devicetree/bindings/spi/spi_atmel.txt @@ -1,7 +1,7 @@ Atmel SPI device Required properties: -- compatible : should be "atmel,at91rm9200-spi". +- compatible : should be "atmel,at91rm9200-spi" or "microchip,sam9x60-spi". - reg: Address and length of the register set for the device - interrupts: Should contain spi interrupt - cs-gpios: chipselects (optional for SPI controller version >= 2 with the