From patchwork Thu Mar 29 14:55:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 48292 X-Patchwork-Delegate: sakari.ailus@iki.fi Received: from vger.kernel.org ([209.132.180.67]) by www.linuxtv.org with esmtp (Exim 4.84_2) (envelope-from ) id 1f1YyQ-0003z9-Tv; Thu, 29 Mar 2018 14:56:19 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752490AbeC2O4P (ORCPT + 1 other); Thu, 29 Mar 2018 10:56:15 -0400 Received: from mail-pg0-f67.google.com ([74.125.83.67]:43285 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752129AbeC2OzO (ORCPT ); Thu, 29 Mar 2018 10:55:14 -0400 Received: by mail-pg0-f67.google.com with SMTP id i124so3207395pgc.10 for ; Thu, 29 Mar 2018 07:55:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=01b8+wtOHadkJG5mmVq4YJ9GoD+SQ0/+11bzilDPHRE=; b=LcMnZRsmWPgXnosORxkdX20ipNwTu44XamV2msoye6fX8DGjEmNjZ0QheQIZM4Nr/o TXaTbJR4H6xO6RlZm4yiKJtZKRJ3mDIh6dJHulQGiJ+7zIbEb/yftf0zZIy5Xk0GZFF3 nqsL4gRmF7sCPj0d0xCJFpCuaFTs8CwRicsfI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=01b8+wtOHadkJG5mmVq4YJ9GoD+SQ0/+11bzilDPHRE=; b=o2XGWGXRjFm65it66e2kFSL7xrLAHtDx6xsGIXmyYPEVGaZwebm5J3pe3FrLEA8t2h 5yJi/+SuPhiUFBHzcBfL/jrYbxlIbVBmZx+vbIc32tTakhh4g5sIvSUxDwVAtqmR5p9b BpEDLdzpe3V+lhFAtRNYsYptZnSFi+KBV3/7MkjbL7b7JeAVi2TRSApw+ayV4LcXvorJ RwUldiCGuLG5fGP2/6m/JpJD10jGk27LEj8qGMDuINGmOMCVgziIs0AYp7yuj17XXTmm Qq9nj5/vXix6FX/BPZ/PLSh0hlV3w5v6CTyXz9hdj9/aENAQHALumD8btcnoDrV+GTJt GG6A== X-Gm-Message-State: AElRT7Hi+RkQs3obW3uZlhPbSwGtmOarRJK3uAROj8G82am3zb8kSJ4S 2ek39bQiu1vR3JQUavM8jxS/CUqO6w== X-Google-Smtp-Source: AIpwx4/cg7RkfHW7XtI0XRVVp0G6TQ09lQ6Z0hwWwtECBHAWxsDWRqug+UH2NIsJKsudKvpxss/gXA== X-Received: by 2002:a17:902:6a85:: with SMTP id n5-v6mr3186595plk.165.1522335313575; Thu, 29 Mar 2018 07:55:13 -0700 (PDT) Received: from mani-sadhasivam-linaro.Home ([103.59.133.81]) by smtp.googlemail.com with ESMTPSA id y69sm13960955pfb.52.2018.03.29.07.55.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 29 Mar 2018 07:55:12 -0700 (PDT) From: Manivannan Sadhasivam To: slongerbeam@gmail.com, mchehab@kernel.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Cc: todor.tomov@linaro.org, nicolas.dechesne@linaro.org, dragonboard@lists.96boards.org, loic.poulain@linaro.org, daniel.thompson@linaro.org, Manivannan Sadhasivam Subject: [RESEND PATCH] media: i2c: ov5640: Add pixel clock support Date: Thu, 29 Mar 2018 20:25:00 +0530 Message-Id: <1522335300-13467-2-git-send-email-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1522335300-13467-1-git-send-email-manivannan.sadhasivam@linaro.org> References: <1522335300-13467-1-git-send-email-manivannan.sadhasivam@linaro.org> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Some of the camera subsystems like camss in Qualcommm MSM chipsets require pixel clock support in camera sensor drivers. So, this commit adds a default pixel clock rate of 96MHz to OV5640 camera sensor driver. According to the datasheet, 96MHz can be used as a pixel clock rate for most of the modes. Signed-off-by: Manivannan Sadhasivam Tested-by: Loic Poulain --- drivers/media/i2c/ov5640.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c index 39a2269..7152c84 100644 --- a/drivers/media/i2c/ov5640.c +++ b/drivers/media/i2c/ov5640.c @@ -162,6 +162,7 @@ struct ov5640_ctrls { struct v4l2_ctrl *auto_gain; struct v4l2_ctrl *gain; }; + struct v4l2_ctrl *pixel_clock; struct v4l2_ctrl *brightness; struct v4l2_ctrl *saturation; struct v4l2_ctrl *contrast; @@ -2009,6 +2010,9 @@ static int ov5640_init_controls(struct ov5640_dev *sensor) ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN, 0, 1023, 1, 0); + /* Pixel clock (default of 96MHz) */ + ctrls->pixel_clock = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE, + 1, INT_MAX, 1, 96000000); ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION, 0, 255, 1, 64); ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE,