From patchwork Wed Oct 16 16:28:13 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 20419 Received: from mail.tu-berlin.de ([130.149.7.33]) by www.linuxtv.org with esmtp (Exim 4.72) (envelope-from ) id 1VWTyI-0007nx-RK; Wed, 16 Oct 2013 18:29:18 +0200 X-tubIT-Incoming-IP: 209.132.180.67 Received: from vger.kernel.org ([209.132.180.67]) by mail.tu-berlin.de (exim-4.72/mailfrontend-5) with esmtp id 1VWTyG-0003hZ-8l; Wed, 16 Oct 2013 18:29:18 +0200 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1761003Ab3JPQ26 (ORCPT + 1 other); Wed, 16 Oct 2013 12:28:58 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:37893 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760949Ab3JPQ2z (ORCPT ); Wed, 16 Oct 2013 12:28:55 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id r9GGSSFw002765; Wed, 16 Oct 2013 11:28:28 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r9GGSSvP022480; Wed, 16 Oct 2013 11:28:28 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Wed, 16 Oct 2013 11:28:28 -0500 Received: from a0393678ub.apr.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id r9GGSHw4031445; Wed, 16 Oct 2013 11:28:26 -0500 From: Kishon Vijay Abraham I To: CC: , , , , Subject: [PATCH 4/7] ARM: Samsung: Remove the MIPI PHY setup code Date: Wed, 16 Oct 2013 21:58:13 +0530 Message-ID: <1381940896-9355-5-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1381940896-9355-1-git-send-email-kishon@ti.com> References: <1381940896-9355-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-PMX-Version: 6.0.0.2142326, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2013.10.16.161815 X-PMX-Spam: Gauge=IIIIIIIII, Probability=9%, Report=' MULTIPLE_RCPTS 0.1, HTML_00_01 0.05, HTML_00_10 0.05, MSGID_ADDED_BY_MTA 0.05, BODY_SIZE_5000_5999 0, BODY_SIZE_7000_LESS 0, FROM_NAME_PHRASE 0, URI_ENDS_IN_HTML 0, __ANY_URI 0, __CP_URI_IN_BODY 0, __CT 0, __CT_TEXT_PLAIN 0, __FRAUD_BODY_WEBMAIL 0, __FRAUD_WEBMAIL 0, __HAS_FROM 0, __HAS_MSGID 0, __HAS_X_MAILER 0, __HAS_X_MAILING_LIST 0, __IN_REP_TO 0, __MIME_TEXT_ONLY 0, __MIME_VERSION 0, __MULTIPLE_RCPTS_CC_X2 0, __SANE_MSGID 0, __SUBJ_ALPHA_END 0, __TO_MALFORMED_2 0, __TO_NO_NAME 0, __URI_NO_WWW 0, __URI_NS ' From: Sylwester Nawrocki Generic PHY drivers are used to handle the MIPI CSIS and MIPI DSIM DPHYs so we can remove now unused code at arch/arm/plat-samsung. In case there is any board file for S5PV210 platforms using MIPI CSIS/DSIM (not any upstream currently) it should use the generic PHY API to bind the PHYs to respective PHY consumer drivers and a platform device for the PHY provider should be defined. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Acked-by: Felipe Balbi Acked-by: Kukjin Kim Signed-off-by: Kishon Vijay Abraham I --- arch/arm/mach-exynos/include/mach/regs-pmu.h | 5 -- arch/arm/mach-s5pv210/include/mach/regs-clock.h | 4 -- arch/arm/plat-samsung/Kconfig | 5 -- arch/arm/plat-samsung/Makefile | 1 - arch/arm/plat-samsung/setup-mipiphy.c | 60 ----------------------- 5 files changed, 75 deletions(-) delete mode 100644 arch/arm/plat-samsung/setup-mipiphy.c diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h index 57344b7..2cdb63e 100644 --- a/arch/arm/mach-exynos/include/mach/regs-pmu.h +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h @@ -44,11 +44,6 @@ #define S5P_DAC_PHY_CONTROL S5P_PMUREG(0x070C) #define S5P_DAC_PHY_ENABLE (1 << 0) -#define S5P_MIPI_DPHY_CONTROL(n) S5P_PMUREG(0x0710 + (n) * 4) -#define S5P_MIPI_DPHY_ENABLE (1 << 0) -#define S5P_MIPI_DPHY_SRESETN (1 << 1) -#define S5P_MIPI_DPHY_MRESETN (1 << 2) - #define S5P_INFORM0 S5P_PMUREG(0x0800) #define S5P_INFORM1 S5P_PMUREG(0x0804) #define S5P_INFORM2 S5P_PMUREG(0x0808) diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h index 032de66..e345584 100644 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h @@ -147,10 +147,6 @@ #define S5P_HDMI_PHY_CONTROL S5P_CLKREG(0xE804) #define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) #define S5P_DAC_PHY_CONTROL S5P_CLKREG(0xE810) -#define S5P_MIPI_DPHY_CONTROL(x) S5P_CLKREG(0xE814) -#define S5P_MIPI_DPHY_ENABLE (1 << 0) -#define S5P_MIPI_DPHY_SRESETN (1 << 1) -#define S5P_MIPI_DPHY_MRESETN (1 << 2) #define S5P_INFORM0 S5P_CLKREG(0xF000) #define S5P_INFORM1 S5P_CLKREG(0xF004) diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 7dfba93..ec882ad 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -395,11 +395,6 @@ config S3C24XX_PWM Support for exporting the PWM timer blocks via the pwm device system -config S5P_SETUP_MIPIPHY - bool - help - Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices - config S3C_SETUP_CAMIF bool help diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 498c7c2..9267d29 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -38,7 +38,6 @@ obj-$(CONFIG_S5P_DEV_UART) += s5p-dev-uart.o obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o obj-$(CONFIG_S3C_SETUP_CAMIF) += setup-camif.o -obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o # DMA support diff --git a/arch/arm/plat-samsung/setup-mipiphy.c b/arch/arm/plat-samsung/setup-mipiphy.c deleted file mode 100644 index 66df315..0000000 --- a/arch/arm/plat-samsung/setup-mipiphy.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics Co., Ltd. - * - * S5P - Helper functions for MIPI-CSIS and MIPI-DSIM D-PHY control - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include - -static int __s5p_mipi_phy_control(int id, bool on, u32 reset) -{ - static DEFINE_SPINLOCK(lock); - void __iomem *addr; - unsigned long flags; - u32 cfg; - - id = max(0, id); - if (id > 1) - return -EINVAL; - - addr = S5P_MIPI_DPHY_CONTROL(id); - - spin_lock_irqsave(&lock, flags); - - cfg = __raw_readl(addr); - cfg = on ? (cfg | reset) : (cfg & ~reset); - __raw_writel(cfg, addr); - - if (on) { - cfg |= S5P_MIPI_DPHY_ENABLE; - } else if (!(cfg & (S5P_MIPI_DPHY_SRESETN | - S5P_MIPI_DPHY_MRESETN) & ~reset)) { - cfg &= ~S5P_MIPI_DPHY_ENABLE; - } - - __raw_writel(cfg, addr); - spin_unlock_irqrestore(&lock, flags); - - return 0; -} - -int s5p_csis_phy_enable(int id, bool on) -{ - return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN); -} -EXPORT_SYMBOL(s5p_csis_phy_enable); - -int s5p_dsim_phy_enable(struct platform_device *pdev, bool on) -{ - return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN); -} -EXPORT_SYMBOL(s5p_dsim_phy_enable);