From patchwork Thu Aug 29 12:32:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Archit Taneja X-Patchwork-Id: 19963 Received: from mail.tu-berlin.de ([130.149.7.33]) by www.linuxtv.org with esmtp (Exim 4.72) (envelope-from ) id 1VF1Qc-0002IV-V7; Thu, 29 Aug 2013 14:34:22 +0200 X-tubIT-Incoming-IP: 209.132.180.67 Received: from vger.kernel.org ([209.132.180.67]) by mail.tu-berlin.de (exim-4.72/mailfrontend-7) with esmtp id 1VF1Qa-0002Yw-2g; Thu, 29 Aug 2013 14:34:22 +0200 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755964Ab3H2MeP (ORCPT + 1 other); Thu, 29 Aug 2013 08:34:15 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:53085 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755649Ab3H2MeO (ORCPT ); Thu, 29 Aug 2013 08:34:14 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id r7TCYCmW011927; Thu, 29 Aug 2013 07:34:12 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r7TCYCnl026101; Thu, 29 Aug 2013 07:34:12 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Thu, 29 Aug 2013 07:34:12 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id r7TCYCBN004872; Thu, 29 Aug 2013 07:34:12 -0500 Received: from localhost (a0393947pc.apr.dhcp.ti.com [172.24.145.166]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id r7TCY9t02912; Thu, 29 Aug 2013 07:34:09 -0500 (CDT) From: Archit Taneja To: CC: , , , , Archit Taneja , Rajendra Nayak , Sricharan R Subject: [PATCH v3 5/6] arm: dra7xx: hwmod data: add VPE hwmod data and ocp_if info Date: Thu, 29 Aug 2013 18:02:51 +0530 Message-ID: <1377779572-22624-6-git-send-email-archit@ti.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1377779572-22624-1-git-send-email-archit@ti.com> References: <1376996457-17275-1-git-send-email-archit@ti.com> <1377779572-22624-1-git-send-email-archit@ti.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-PMX-Version: 6.0.0.2142326, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2013.8.29.122416 X-PMX-Spam: Gauge=IIIIIIIII, Probability=9%, Report=' MULTIPLE_RCPTS 0.1, HTML_00_01 0.05, HTML_00_10 0.05, MSGID_ADDED_BY_MTA 0.05, BODYTEXTP_SIZE_3000_LESS 0, BODY_SIZE_2000_2999 0, BODY_SIZE_5000_LESS 0, BODY_SIZE_7000_LESS 0, URI_ENDS_IN_HTML 0, __ANY_URI 0, __CP_URI_IN_BODY 0, __CT 0, __CT_TEXT_PLAIN 0, __HAS_FROM 0, __HAS_MSGID 0, __HAS_X_MAILER 0, __HAS_X_MAILING_LIST 0, __IN_REP_TO 0, __LINES_OF_YELLING 0, __MIME_TEXT_ONLY 0, __MIME_VERSION 0, __MULTIPLE_RCPTS_CC_X2 0, __SANE_MSGID 0, __SUBJ_ALPHA_END 0, __TO_MALFORMED_2 0, __TO_NO_NAME 0, __URI_NO_WWW 0, __URI_NS ' Add hwmod data for the VPE IP, this is needed for the IP to be reset during boot, and control the functional clock when the driver needs it via pm_runtime apis. Add the corresponding ocp_if struct and add it DRA7XX's ocp interface list. Cc: Rajendra Nayak Cc: Sricharan R Signed-off-by: Archit Taneja --- arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 42 +++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index f647998b..181365d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -1883,6 +1883,39 @@ static struct omap_hwmod dra7xx_wd_timer2_hwmod = { }, }; +/* + * 'vpe' class + * + */ + +static struct omap_hwmod_class_sysconfig dra7xx_vpe_sysc = { + .sysc_offs = 0x0010, + .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | + SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | + MSTANDBY_SMART | MSTANDBY_SMART_WKUP), + .sysc_fields = &omap_hwmod_sysc_type2, +}; + +static struct omap_hwmod_class dra7xx_vpe_hwmod_class = { + .name = "vpe", + .sysc = &dra7xx_vpe_sysc, +}; + +/* vpe */ +static struct omap_hwmod dra7xx_vpe_hwmod = { + .name = "vpe", + .class = &dra7xx_vpe_hwmod_class, + .clkdm_name = "vpe_clkdm", + .main_clk = "dpll_core_h23x2_ck", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_VPE_VPE_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_VPE_VPE_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, + }, + }, +}; /* * Interfaces @@ -2636,6 +2669,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__wd_timer2 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_per3 -> vpe */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__vpe = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_vpe_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l3_main_2__l3_instr, &dra7xx_l4_cfg__l3_main_1, @@ -2714,6 +2755,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l3_main_1__vcp2, &dra7xx_l4_per2__vcp2, &dra7xx_l4_wkup__wd_timer2, + &dra7xx_l4_per3__vpe, NULL, };