From patchwork Tue Jul 2 03:31:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Libin Yang X-Patchwork-Id: 19131 Received: from mail.tu-berlin.de ([130.149.7.33]) by www.linuxtv.org with esmtp (Exim 4.72) (envelope-from ) id 1UtrJO-0007QS-2b; Tue, 02 Jul 2013 05:31:26 +0200 X-tubIT-Incoming-IP: 209.132.180.67 Received: from vger.kernel.org ([209.132.180.67]) by mail.tu-berlin.de (exim-4.72/mailfrontend-8) with esmtp id 1UtrJM-0002zQ-jL; Tue, 02 Jul 2013 05:31:25 +0200 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755263Ab3GBDbV (ORCPT + 1 other); Mon, 1 Jul 2013 23:31:21 -0400 Received: from na3sys009aog128.obsmtp.com ([74.125.149.141]:54026 "EHLO na3sys009aog128.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752701Ab3GBDbV (ORCPT ); Mon, 1 Jul 2013 23:31:21 -0400 Received: from SC-OWA01.marvell.com ([199.233.58.136]) (using TLSv1) by na3sys009aob128.postini.com ([74.125.148.12]) with SMTP ID DSNKUdJJhmKqsYzA+qEH2MT1OVdruSmLcrm4@postini.com; Mon, 01 Jul 2013 20:31:21 PDT Received: from maili.marvell.com (10.93.76.43) by sc-owa01.marvell.com (10.93.76.21) with Microsoft SMTP Server id 8.3.213.0; Mon, 1 Jul 2013 20:31:13 -0700 Received: from localhost (unknown [10.38.36.205]) by maili.marvell.com (Postfix) with ESMTP id 5EE8E1CCD9C; Mon, 1 Jul 2013 20:31:13 -0700 (PDT) From: Libin Yang To: , CC: , , Libin Yang , Albert Wang Subject: [PATCH v2 2/7] marvell-ccic: add clock tree support for marvell-ccic driver Date: Tue, 2 Jul 2013 11:31:03 +0800 Message-ID: <1372735868-15880-3-git-send-email-lbyang@marvell.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1372735868-15880-1-git-send-email-lbyang@marvell.com> References: <1372735868-15880-1-git-send-email-lbyang@marvell.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-PMX-Version: 6.0.0.2142326, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2013.7.2.32117 X-PMX-Spam: Gauge=IIIIIIIII, Probability=9%, Report=' MULTIPLE_RCPTS 0.1, HTML_00_01 0.05, HTML_00_10 0.05, MSGID_ADDED_BY_MTA 0.05, BODY_SIZE_3000_3999 0, BODY_SIZE_5000_LESS 0, BODY_SIZE_7000_LESS 0, URI_ENDS_IN_HTML 0, __ANY_URI 0, __CP_URI_IN_BODY 0, __CT 0, __CT_TEXT_PLAIN 0, __DATE_TZ_HK 0, __HAS_FROM 0, __HAS_MSGID 0, __HAS_X_MAILER 0, __HAS_X_MAILING_LIST 0, __IN_REP_TO 0, __MIME_TEXT_ONLY 0, __MIME_VERSION 0, __MULTIPLE_RCPTS_CC_X2 0, __SANE_MSGID 0, __SUBJ_ALPHA_END 0, __TO_MALFORMED_2 0, __TO_NO_NAME 0, __URI_NO_WWW 0, __URI_NS ' This patch adds the clock tree support for marvell-ccic. Signed-off-by: Libin Yang Signed-off-by: Albert Wang --- drivers/media/platform/marvell-ccic/mcam-core.h | 6 +++ drivers/media/platform/marvell-ccic/mmp-driver.c | 47 ++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/drivers/media/platform/marvell-ccic/mcam-core.h b/drivers/media/platform/marvell-ccic/mcam-core.h index 90162ef..6a68aa4 100644 --- a/drivers/media/platform/marvell-ccic/mcam-core.h +++ b/drivers/media/platform/marvell-ccic/mcam-core.h @@ -83,6 +83,8 @@ struct mcam_frame_state { unsigned int delivered; }; +#define NR_MCAM_CLK 3 + /* * A description of one of our devices. * Locking: controlled by s_mutex. Certain fields, however, require @@ -118,6 +120,10 @@ struct mcam_camera { bool mipi_enabled; /* flag whether mipi is enable already */ int lane; /* lane number */ + /* clock tree support */ + struct clk *clk[NR_MCAM_CLK]; + + /* * Callbacks from the core to the platform code. */ diff --git a/drivers/media/platform/marvell-ccic/mmp-driver.c b/drivers/media/platform/marvell-ccic/mmp-driver.c index 3b343ce..3830c44 100644 --- a/drivers/media/platform/marvell-ccic/mmp-driver.c +++ b/drivers/media/platform/marvell-ccic/mmp-driver.c @@ -35,6 +35,8 @@ MODULE_ALIAS("platform:mmp-camera"); MODULE_AUTHOR("Jonathan Corbet "); MODULE_LICENSE("GPL"); +static char *mcam_clks[] = {"CCICAXICLK", "CCICFUNCLK", "CCICPHYCLK"}; + struct mmp_camera { void *power_regs; struct platform_device *pdev; @@ -105,6 +107,26 @@ static struct mmp_camera *mmpcam_find_device(struct platform_device *pdev) #define REG_CCIC_DCGCR 0x28 /* CCIC dyn clock gate ctrl reg */ #define REG_CCIC_CRCR 0x50 /* CCIC clk reset ctrl reg */ +static void mcam_clk_enable(struct mcam_camera *mcam) +{ + unsigned int i; + + for (i = 0; i < NR_MCAM_CLK; i++) { + if (!IS_ERR(mcam->clk[i])) + clk_prepare_enable(mcam->clk[i]); + } +} + +static void mcam_clk_disable(struct mcam_camera *mcam) +{ + int i; + + for (i = NR_MCAM_CLK - 1; i >= 0; i--) { + if (!IS_ERR(mcam->clk[i])) + clk_disable_unprepare(mcam->clk[i]); + } +} + /* * Power control. */ @@ -135,6 +157,9 @@ static int mmpcam_power_up(struct mcam_camera *mcam) mdelay(5); gpio_set_value(pdata->sensor_reset_gpio, 1); /* reset is active low */ mdelay(5); + + mcam_clk_enable(mcam); + if (mcam->bus_type == V4L2_MBUS_CSI2) { cam->mipi_clk = devm_clk_get(mcam->dev, "mipi"); if ((IS_ERR(cam->mipi_clk) && mcam->dphy[2] == 0)) @@ -164,6 +189,8 @@ static void mmpcam_power_down(struct mcam_camera *mcam) devm_clk_put(mcam->dev, cam->mipi_clk); cam->mipi_clk = NULL; } + + mcam_clk_disable(mcam); } /* @@ -274,6 +301,23 @@ static irqreturn_t mmpcam_irq(int irq, void *data) return IRQ_RETVAL(handled); } +static int mcam_init_clk(struct mcam_camera *mcam, + struct mmp_camera_platform_data *pdata) +{ + unsigned int i; + + for (i = 0; i < NR_MCAM_CLK; i++) { + if (mcam_clks[i] != NULL) { + mcam->clk[i] = devm_clk_get(mcam->dev, mcam_clks[i]); + if (IS_ERR(mcam->clk[i])) { + dev_err(mcam->dev, "Could not get clk: %s\n", + mcam_clks[i]); + return PTR_ERR(mcam->clk[i]); + } + } + } + return 0; +} static int mmpcam_probe(struct platform_device *pdev) { @@ -341,6 +385,9 @@ static int mmpcam_probe(struct platform_device *pdev) ret = -ENODEV; goto out_unmap1; } + + mcam_init_clk(mcam, pdata); + /* * Find the i2c adapter. This assumes, of course, that the * i2c bus is already up and functioning.