From patchwork Tue Jun 4 05:42:44 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Libin Yang X-Patchwork-Id: 18782 X-Patchwork-Delegate: hverkuil@xs4all.nl Received: from mail.tu-berlin.de ([130.149.7.33]) by www.linuxtv.org with esmtp (Exim 4.72) (envelope-from ) id 1Ujk3O-0003Ke-SS; Tue, 04 Jun 2013 07:45:06 +0200 X-tubIT-Incoming-IP: 209.132.180.67 Received: from vger.kernel.org ([209.132.180.67]) by mail.tu-berlin.de (exim-4.72/mailfrontend-6) with esmtp id 1Ujk3M-0005Xf-6Q; Tue, 04 Jun 2013 07:45:06 +0200 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751955Ab3FDFpD (ORCPT + 1 other); Tue, 4 Jun 2013 01:45:03 -0400 Received: from na3sys009aog108.obsmtp.com ([74.125.149.199]:47396 "EHLO na3sys009aog108.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751359Ab3FDFpC (ORCPT ); Tue, 4 Jun 2013 01:45:02 -0400 Received: from SC-OWA01.marvell.com ([199.233.58.136]) (using TLSv1) by na3sys009aob108.postini.com ([74.125.148.12]) with SMTP ID DSNKUa1+2Tq9Lq+SkekPqnkdUpEA5qTdWhfX@postini.com; Mon, 03 Jun 2013 22:45:01 PDT Received: from [10.38.36.180] (10.38.36.180) by sc-owa01.marvell.com (10.93.76.21) with Microsoft SMTP Server (TLS) id 8.3.213.0; Mon, 3 Jun 2013 22:42:45 -0700 Message-ID: <1370324564.26072.22.camel@younglee-desktop> Subject: [PATCH 2/7] marvell-ccic: add clock tree support for marvell-ccic driver From: lbyang Reply-To: To: , , CC: , , Date: Tue, 4 Jun 2013 13:42:44 +0800 X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-PMX-Version: 6.0.0.2142326, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2013.6.4.53321 X-PMX-Spam: Gauge=IIIIIIIII, Probability=9%, Report=' MULTIPLE_RCPTS 0.1, FROM_NAME_ONE_WORD 0.05, HTML_00_01 0.05, HTML_00_10 0.05, MSGID_ADDED_BY_MTA 0.05, BODY_SIZE_3000_3999 0, BODY_SIZE_5000_LESS 0, BODY_SIZE_7000_LESS 0, CT_TEXT_PLAIN_UTF8_CAPS 0, INVALID_MSGID_NO_FQDN 0, URI_ENDS_IN_HTML 0, __ANY_URI 0, __CP_URI_IN_BODY 0, __CT 0, __CTE 0, __CT_TEXT_PLAIN 0, __DATE_TZ_HK 0, __HAS_FROM 0, __HAS_MSGID 0, __HAS_REPLYTO 0, __HAS_X_MAILER 0, __HAS_X_MAILING_LIST 0, __MIME_TEXT_ONLY 0, __MIME_VERSION 0, __MULTIPLE_RCPTS_CC_X2 0, __REPLYTO_SAMEAS_FROM_ACC 0, __REPLYTO_SAMEAS_FROM_ADDY 0, __REPLYTO_SAMEAS_FROM_DOMAIN 0, __SANE_MSGID 0, __SUBJ_ALPHA_END 0, __TO_MALFORMED_2 0, __TO_NO_NAME 0, __URI_NO_WWW 0, __URI_NS ' From: Libin Yang This patch adds the clock tree support for marvell-ccic. Signed-off-by: Libin Yang Signed-off-by: Albert Wang Acked-by: Jonathan Corbet --- drivers/media/platform/marvell-ccic/mcam-core.h | 5 +++ drivers/media/platform/marvell-ccic/mmp-driver.c | 48 ++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/drivers/media/platform/marvell-ccic/mcam-core.h b/drivers/media/platform/marvell-ccic/mcam-core.h index be271b3..c506cd3 100644 --- a/drivers/media/platform/marvell-ccic/mcam-core.h +++ b/drivers/media/platform/marvell-ccic/mcam-core.h @@ -83,6 +83,8 @@ struct mcam_frame_state { unsigned int delivered; }; +#define NR_MCAM_CLK 3 + /* * A description of one of our devices. * Locking: controlled by s_mutex. Certain fields, however, require @@ -113,6 +115,9 @@ struct mcam_camera { bool mipi_enabled; int lane; /* lane number */ + /* clock tree support */ + struct clk *clk[NR_MCAM_CLK]; + /* * Callbacks from the core to the platform code. */ diff --git a/drivers/media/platform/marvell-ccic/mmp-driver.c b/drivers/media/platform/marvell-ccic/mmp-driver.c index 3dad182..233d0ff 100644 --- a/drivers/media/platform/marvell-ccic/mmp-driver.c +++ b/drivers/media/platform/marvell-ccic/mmp-driver.c @@ -35,6 +35,8 @@ MODULE_ALIAS("platform:mmp-camera"); MODULE_AUTHOR("Jonathan Corbet "); MODULE_LICENSE("GPL"); +static char *mcam_clks[] = {"CCICAXICLK", "CCICFUNCLK", "CCICPHYCLK"}; + struct mmp_camera { void *power_regs; struct platform_device *pdev; @@ -105,6 +107,26 @@ static struct mmp_camera *mmpcam_find_device(struct platform_device *pdev) #define REG_CCIC_DCGCR 0x28 /* CCIC dyn clock gate ctrl reg */ #define REG_CCIC_CRCR 0x50 /* CCIC clk reset ctrl reg */ +static void mcam_clk_enable(struct mcam_camera *mcam) +{ + unsigned int i; + + for (i = 0; i < NR_MCAM_CLK; i++) { + if (!IS_ERR_OR_NULL(mcam->clk[i])) + clk_prepare_enable(mcam->clk[i]); + } +} + +static void mcam_clk_disable(struct mcam_camera *mcam) +{ + int i; + + for (i = NR_MCAM_CLK - 1; i >= 0; i--) { + if (!IS_ERR_OR_NULL(mcam->clk[i])) + clk_disable_unprepare(mcam->clk[i]); + } +} + /* * Power control. */ @@ -135,11 +157,15 @@ static int mmpcam_power_up(struct mcam_camera *mcam) mdelay(5); gpio_set_value(pdata->sensor_reset_gpio, 1); /* reset is active low */ mdelay(5); + + mcam_clk_enable(mcam); + if (mcam->bus_type == V4L2_MBUS_CSI2 && IS_ERR(cam->mipi_clk)) { cam->mipi_clk = devm_clk_get(mcam->dev, "mipi"); if ((IS_ERR(cam->mipi_clk) && mcam->dphy[2] == 0)) return PTR_ERR(cam->mipi_clk); } + return 0; } @@ -163,6 +189,8 @@ static void mmpcam_power_down(struct mcam_camera *mcam) devm_clk_put(mcam->dev, cam->mipi_clk); cam->mipi_clk = ERR_PTR(-EINVAL); } + + mcam_clk_disable(mcam); } /* @@ -271,6 +299,23 @@ static irqreturn_t mmpcam_irq(int irq, void *data) return IRQ_RETVAL(handled); } +static int mcam_init_clk(struct mcam_camera *mcam, + struct mmp_camera_platform_data *pdata) +{ + unsigned int i; + + for (i = 0; i < NR_MCAM_CLK; i++) { + if (mcam_clks[i] != NULL) { + mcam->clk[i] = devm_clk_get(mcam->dev, mcam_clks[i]); + if (IS_ERR(mcam->clk[i])) { + dev_err(mcam->dev, "Could not get clk: %s\n", + mcam_clks[i]); + return PTR_ERR(mcam->clk[i]); + } + } + } + return 0; +} static int mmpcam_probe(struct platform_device *pdev) { @@ -338,6 +383,9 @@ static int mmpcam_probe(struct platform_device *pdev) ret = -ENODEV; goto out_unmap1; } + + mcam_init_clk(mcam, pdata); + /* * Find the i2c adapter. This assumes, of course, that the * i2c bus is already up and functioning.