From patchwork Sat Apr 13 09:48:40 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Frank Schaefer X-Patchwork-Id: 17925 X-Patchwork-Delegate: hverkuil@xs4all.nl Received: from mail.tu-berlin.de ([130.149.7.33]) by www.linuxtv.org with esmtp (Exim 4.72) (envelope-from ) id 1UQx3y-0002KP-Pl; Sat, 13 Apr 2013 11:48:02 +0200 X-tubIT-Incoming-IP: 209.132.180.67 Received: from vger.kernel.org ([209.132.180.67]) by mail.tu-berlin.de (exim-4.75/mailfrontend-4) with esmtp id 1UQx3o-0003dd-AQ; Sat, 13 Apr 2013 11:48:02 +0200 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752764Ab3DMJrt (ORCPT + 1 other); Sat, 13 Apr 2013 05:47:49 -0400 Received: from mail-ea0-f169.google.com ([209.85.215.169]:36063 "EHLO mail-ea0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752482Ab3DMJrn (ORCPT ); Sat, 13 Apr 2013 05:47:43 -0400 Received: by mail-ea0-f169.google.com with SMTP id n15so1591901ead.0 for ; Sat, 13 Apr 2013 02:47:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:mime-version:content-type:content-transfer-encoding; bh=Ee6DjNu8F1Y3EIUWxgGbvrsy+YDHcZeQ30s6ukTSVZY=; b=J30r83RoQml4I0jY9kc8GVjh4o/Pi4JeRSge4Rhie7ojlSn+9YZD+yVoLo3Tlz9bbn slw2BGw6oJ+VBM76x39aSHhLCqUXioGABwfUnw1uv2GvGs3p/9kgPWQ9waaNivAhp7Ht ShFTZijUkz66OefE8+DrERjSX1N3JMvO8J11hV9VFCZjAoL3fsUzVkyR46u2AU4JxmBV 4HRKAri8Up6fcykUw3ykzOH5MDq9uEr4GNrMeSAOQ1hjMucDQJC965qIsfG98y9wHM46 bvKkAd9H4lLJLuZHEEtFb/Q6QAyiB+lAaDjSgQjeIvNv2EKb5/8nOJ8SBzw9VT5GGpfW Vluw== X-Received: by 10.15.34.199 with SMTP id e47mr37166330eev.35.1365846461640; Sat, 13 Apr 2013 02:47:41 -0700 (PDT) Received: from Athlon64X2-5000.site (ip-109-90-247-142.unitymediagroup.de. [109.90.247.142]) by mx.google.com with ESMTPS id a2sm14060659eem.11.2013.04.13.02.47.40 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 13 Apr 2013 02:47:41 -0700 (PDT) From: =?UTF-8?q?Frank=20Sch=C3=A4fer?= To: mchehab@redhat.com Cc: linux-media@vger.kernel.org, =?UTF-8?q?Frank=20Sch=C3=A4fer?= Subject: [PATCH 2/3] em28xx: add register defines for em25xx/em276x/7x/8x GPIO registers Date: Sat, 13 Apr 2013 11:48:40 +0200 Message-Id: <1365846521-3127-3-git-send-email-fschaefer.oss@googlemail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1365846521-3127-1-git-send-email-fschaefer.oss@googlemail.com> References: <1365846521-3127-1-git-send-email-fschaefer.oss@googlemail.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-PMX-Version: 5.6.1.2065439, Antispam-Engine: 2.7.2.376379, Antispam-Data: 2013.4.10.225128 X-PMX-Spam: Gauge=IIIIIIII, Probability=8%, Report=' MULTIPLE_RCPTS 0.1, HTML_00_01 0.05, HTML_00_10 0.05, BODYTEXTP_SIZE_3000_LESS 0, BODY_SIZE_1100_1199 0, BODY_SIZE_2000_LESS 0, BODY_SIZE_5000_LESS 0, BODY_SIZE_7000_LESS 0, CT_TEXT_PLAIN_UTF8_CAPS 0, DKIM_SIGNATURE 0, URI_ENDS_IN_HTML 0, __ANY_URI 0, __CP_URI_IN_BODY 0, __CT 0, __CTE 0, __CT_TEXT_PLAIN 0, __FRAUD_BODY_WEBMAIL 0, __FRAUD_WEBMAIL 0, __FRAUD_WEBMAIL_FROM 0, __HAS_FROM 0, __HAS_MSGID 0, __HAS_X_MAILER 0, __HAS_X_MAILING_LIST 0, __IN_REP_TO 0, __MIME_TEXT_ONLY 0, __MIME_VERSION 0, __MULTIPLE_RCPTS_CC_X2 0, __PHISH_SPEAR_STRUCTURE_1 0, __SANE_MSGID 0, __SUBJ_ALPHA_END 0, __TO_MALFORMED_2 0, __TO_NO_NAME 0, __URI_NO_WWW 0, __URI_NS , __YOUTUBE_RCVD 0' em25xx/em276x/7x/8x provides 3 GPIO register sets, each of them consisting of separate read and a write registers. Signed-off-by: Frank Schäfer --- drivers/media/usb/em28xx/em28xx-reg.h | 8 ++++++++ 1 Datei geändert, 8 Zeilen hinzugefügt(+) diff --git a/drivers/media/usb/em28xx/em28xx-reg.h b/drivers/media/usb/em28xx/em28xx-reg.h index 622871d..ebc5663 100644 --- a/drivers/media/usb/em28xx/em28xx-reg.h +++ b/drivers/media/usb/em28xx/em28xx-reg.h @@ -195,6 +195,14 @@ #define EM2874_R5F_TS_ENABLE 0x5f #define EM2874_R80_GPIO 0x80 +/* em25xx, em276x/7x/8x GPIO registers */ +#define EM25XX_R80_GPIO_P0_W 0x80 +#define EM25XX_R81_GPIO_P1_W 0x81 +#define EM25XX_R83_GPIO_P3_W 0x83 +#define EM25XX_R84_GPIO_P0_R 0x84 +#define EM25XX_R85_GPIO_P1_R 0x85 +#define EM25XX_R87_GPIO_P3_R 0x87 + /* em2874 IR config register (0x50) */ #define EM2874_IR_NEC 0x00 #define EM2874_IR_NEC_NO_PARITY 0x01