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[70.73.24.112]) by mx.google.com with ESMTPS id kl2sm2639359pbc.19.2012.05.03.15.22.38 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 03 May 2012 15:22:39 -0700 (PDT) From: mathieu.poirier@linaro.org To: mchehab@infradead.org Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, mathieu.poirier@linaro.org Subject: [PATCH 6/6] video/omap24xxcam: use __iomem annotations Date: Thu, 3 May 2012 16:22:27 -0600 Message-Id: <1336083747-3142-7-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1336083747-3142-1-git-send-email-mathieu.poirier@linaro.org> References: <1336083747-3142-1-git-send-email-mathieu.poirier@linaro.org> X-Gm-Message-State: ALoCoQm6xQgnDqBkDxDFCQNzQbhAa7Z0AdokYoF+SkvR5tD82qZsKYZXLTqGxMNyHzxA329HByHT Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-PMX-Version: 5.6.1.2065439, Antispam-Engine: 2.7.2.376379, Antispam-Data: 2012.5.3.221217 X-PMX-Spam: Gauge=IIIIIIII, Probability=8%, Report=' MULTIPLE_RCPTS 0.1, HTML_00_01 0.05, HTML_00_10 0.05, BODY_SIZE_6000_6999 0, BODY_SIZE_7000_LESS 0, DATE_TZ_NA 0, NO_REAL_NAME 0, URI_ENDS_IN_HTML 0, __ANY_URI 0, __CP_MEDIA_BODY 0, __CP_URI_IN_BODY 0, __HAS_MSGID 0, __HAS_X_MAILER 0, __HAS_X_MAILING_LIST 0, __MIME_TEXT_ONLY 0, __MULTIPLE_RCPTS_CC_X2 0, __SANE_MSGID 0, __TO_MALFORMED_2 0, __TO_NO_NAME 0, __URI_NO_WWW 0, __URI_NS ' From: Arnd Bergmann MMIO registers are __iomem tokens in virtual address space, not integers. Signed-off-by: Arnd Bergmann Signed-off-by: Mathieu Poirier --- drivers/media/video/omap24xxcam-dma.c | 20 ++++++++++---------- drivers/media/video/omap24xxcam.c | 3 +-- drivers/media/video/omap24xxcam.h | 14 +++++++------- 3 files changed, 18 insertions(+), 19 deletions(-) diff --git a/drivers/media/video/omap24xxcam-dma.c b/drivers/media/video/omap24xxcam-dma.c index 3ea38a8..b5ae170 100644 --- a/drivers/media/video/omap24xxcam-dma.c +++ b/drivers/media/video/omap24xxcam-dma.c @@ -38,7 +38,7 @@ */ /* Ack all interrupt on CSR and IRQSTATUS_L0 */ -static void omap24xxcam_dmahw_ack_all(unsigned long base) +static void omap24xxcam_dmahw_ack_all(void __iomem *base) { u32 csr; int i; @@ -52,7 +52,7 @@ static void omap24xxcam_dmahw_ack_all(unsigned long base) } /* Ack dmach on CSR and IRQSTATUS_L0 */ -static u32 omap24xxcam_dmahw_ack_ch(unsigned long base, int dmach) +static u32 omap24xxcam_dmahw_ack_ch(void __iomem *base, int dmach) { u32 csr; @@ -65,12 +65,12 @@ static u32 omap24xxcam_dmahw_ack_ch(unsigned long base, int dmach) return csr; } -static int omap24xxcam_dmahw_running(unsigned long base, int dmach) +static int omap24xxcam_dmahw_running(void __iomem *base, int dmach) { return omap24xxcam_reg_in(base, CAMDMA_CCR(dmach)) & CAMDMA_CCR_ENABLE; } -static void omap24xxcam_dmahw_transfer_setup(unsigned long base, int dmach, +static void omap24xxcam_dmahw_transfer_setup(void __iomem *base, int dmach, dma_addr_t start, u32 len) { omap24xxcam_reg_out(base, CAMDMA_CCR(dmach), @@ -112,7 +112,7 @@ static void omap24xxcam_dmahw_transfer_setup(unsigned long base, int dmach, | CAMDMA_CICR_DROP_IE); } -static void omap24xxcam_dmahw_transfer_start(unsigned long base, int dmach) +static void omap24xxcam_dmahw_transfer_start(void __iomem *base, int dmach) { omap24xxcam_reg_out(base, CAMDMA_CCR(dmach), CAMDMA_CCR_SEL_SRC_DST_SYNC @@ -124,7 +124,7 @@ static void omap24xxcam_dmahw_transfer_start(unsigned long base, int dmach) | CAMDMA_CCR_SYNCHRO_CAMERA); } -static void omap24xxcam_dmahw_transfer_chain(unsigned long base, int dmach, +static void omap24xxcam_dmahw_transfer_chain(void __iomem *base, int dmach, int free_dmach) { int prev_dmach, ch; @@ -160,7 +160,7 @@ static void omap24xxcam_dmahw_transfer_chain(unsigned long base, int dmach, * controller may not be idle after this routine completes, because * the completion routines might start new transfers. */ -static void omap24xxcam_dmahw_abort_ch(unsigned long base, int dmach) +static void omap24xxcam_dmahw_abort_ch(void __iomem *base, int dmach) { /* mask all interrupts from this channel */ omap24xxcam_reg_out(base, CAMDMA_CICR(dmach), 0); @@ -171,7 +171,7 @@ static void omap24xxcam_dmahw_abort_ch(unsigned long base, int dmach) omap24xxcam_reg_merge(base, CAMDMA_CCR(dmach), 0, CAMDMA_CCR_ENABLE); } -static void omap24xxcam_dmahw_init(unsigned long base) +static void omap24xxcam_dmahw_init(void __iomem *base) { omap24xxcam_reg_out(base, CAMDMA_OCP_SYSCONFIG, CAMDMA_OCP_SYSCONFIG_MIDLEMODE_FSTANDBY @@ -362,7 +362,7 @@ void omap24xxcam_dma_hwinit(struct omap24xxcam_dma *dma) } static void omap24xxcam_dma_init(struct omap24xxcam_dma *dma, - unsigned long base) + void __iomem *base) { int ch; @@ -577,7 +577,7 @@ void omap24xxcam_sgdma_sync(struct omap24xxcam_sgdma *sgdma) } void omap24xxcam_sgdma_init(struct omap24xxcam_sgdma *sgdma, - unsigned long base, + void __iomem *base, void (*reset_callback)(unsigned long data), unsigned long reset_callback_data) { diff --git a/drivers/media/video/omap24xxcam.c b/drivers/media/video/omap24xxcam.c index 7d38641..e5015b0 100644 --- a/drivers/media/video/omap24xxcam.c +++ b/drivers/media/video/omap24xxcam.c @@ -1776,8 +1776,7 @@ static int __devinit omap24xxcam_probe(struct platform_device *pdev) cam->mmio_size = resource_size(mem); /* map the region */ - cam->mmio_base = (unsigned long) - ioremap_nocache(cam->mmio_base_phys, cam->mmio_size); + cam->mmio_base = ioremap_nocache(cam->mmio_base_phys, cam->mmio_size); if (!cam->mmio_base) { dev_err(cam->dev, "cannot map camera register I/O region\n"); goto err; diff --git a/drivers/media/video/omap24xxcam.h b/drivers/media/video/omap24xxcam.h index 2ce67f5..d59727a 100644 --- a/drivers/media/video/omap24xxcam.h +++ b/drivers/media/video/omap24xxcam.h @@ -429,7 +429,7 @@ struct sgdma_state { struct omap24xxcam_dma { spinlock_t lock; /* Lock for the whole structure. */ - unsigned long base; /* base address for dma controller */ + void __iomem *base; /* base address for dma controller */ /* While dma_stop!=0, an attempt to start a new DMA transfer will * fail. @@ -491,7 +491,7 @@ struct omap24xxcam_device { /*** hardware resources ***/ unsigned int irq; - unsigned long mmio_base; + void __iomem *mmio_base; unsigned long mmio_base_phys; unsigned long mmio_size; @@ -544,22 +544,22 @@ struct omap24xxcam_fh { * */ -static inline u32 omap24xxcam_reg_in(unsigned long base, u32 offset) +static inline u32 omap24xxcam_reg_in(u32 __iomem *base, u32 offset) { return readl(base + offset); } -static inline u32 omap24xxcam_reg_out(unsigned long base, u32 offset, +static inline u32 omap24xxcam_reg_out(u32 __iomem *base, u32 offset, u32 val) { writel(val, base + offset); return val; } -static inline u32 omap24xxcam_reg_merge(unsigned long base, u32 offset, +static inline u32 omap24xxcam_reg_merge(u32 __iomem *base, u32 offset, u32 val, u32 mask) { - u32 addr = base + offset; + u32 __iomem *addr = base + offset; u32 new_val = (readl(addr) & ~mask) | (val & mask); writel(new_val, addr); @@ -585,7 +585,7 @@ int omap24xxcam_sgdma_queue(struct omap24xxcam_sgdma *sgdma, int len, sgdma_callback_t callback, void *arg); void omap24xxcam_sgdma_sync(struct omap24xxcam_sgdma *sgdma); void omap24xxcam_sgdma_init(struct omap24xxcam_sgdma *sgdma, - unsigned long base, + void __iomem *base, void (*reset_callback)(unsigned long data), unsigned long reset_callback_data); void omap24xxcam_sgdma_exit(struct omap24xxcam_sgdma *sgdma);