From patchwork Tue Dec 15 16:37:31 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: m-karicheri2@ti.com X-Patchwork-Id: 2312 Return-path: Envelope-to: mchehab@infradead.org Delivery-date: Tue, 15 Dec 2009 16:37:41 +0000 Received: from bombadil.infradead.org [18.85.46.34] by pedra with IMAP (fetchmail-6.3.6) for (single-drop); Tue, 15 Dec 2009 14:39:34 -0200 (BRST) Received: from vger.kernel.org ([209.132.180.67]) by bombadil.infradead.org with esmtp (Exim 4.69 #1 (Red Hat Linux)) id 1NKaP7-0008CK-1w; Tue, 15 Dec 2009 16:37:41 +0000 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759342AbZLOQhj (ORCPT + 1 other); Tue, 15 Dec 2009 11:37:39 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1754340AbZLOQhj (ORCPT ); Tue, 15 Dec 2009 11:37:39 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:37903 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752953AbZLOQhi (ORCPT ); Tue, 15 Dec 2009 11:37:38 -0500 Received: from dlep34.itg.ti.com ([157.170.170.115]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id nBFGbbEl006466 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 15 Dec 2009 10:37:37 -0600 Received: from legion.dal.design.ti.com (localhost [127.0.0.1]) by dlep34.itg.ti.com (8.13.7/8.13.7) with ESMTP id nBFGbaO2025638; Tue, 15 Dec 2009 10:37:36 -0600 (CST) Received: from gt516km11.gt.design.ti.com (gt516km11.gt.design.ti.com [158.218.100.179]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id nBFGbaZ06923; Tue, 15 Dec 2009 10:37:36 -0600 (CST) Received: from gt516km11.gt.design.ti.com (localhost.localdomain [127.0.0.1]) by gt516km11.gt.design.ti.com (8.13.1/8.13.1) with ESMTP id nBFGbZri013256; Tue, 15 Dec 2009 11:37:35 -0500 Received: (from a0868495@localhost) by gt516km11.gt.design.ti.com (8.13.1/8.13.1/Submit) id nBFGbYSX013253; Tue, 15 Dec 2009 11:37:34 -0500 From: m-karicheri2@ti.com To: linux-media@vger.kernel.org, hverkuil@xs4all.nl, khilman@deeprootsystems.com Cc: davinci-linux-open-source@linux.davincidsp.com, Muralidharan Karicheri Subject: [PATCH - v3 4/4] DaVinci - vpfe-capture-converting ccdc drivers to platform driver Date: Tue, 15 Dec 2009 11:37:31 -0500 Message-Id: <1260895054-13232-1-git-send-email-m-karicheri2@ti.com> X-Mailer: git-send-email 1.6.0.4 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Muralidharan Karicheri This combines the two patches sent earlier to change the clock configuration and converting ccdc drivers to platform drivers. This has updated comments against v2 of these patches. Two new clocks "master" and "slave" are defined for ccdc driver as per comments from Kevin Hilman. This adds platform code for ccdc driver on DM355 and DM6446. Reviewed-by: Vaibhav Hiremath Reviewed-by: Kevin Hilman Signed-off-by: Muralidharan Karicheri --- Applies to linux-davinci tree arch/arm/mach-davinci/dm355.c | 41 ++++++++++++++++++++++++++++----------- arch/arm/mach-davinci/dm644x.c | 20 ++++++++++++++++++- 2 files changed, 48 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 2244e8c..a9ea761 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -378,6 +378,8 @@ static struct davinci_clk dm355_clks[] = { CLK(NULL, "timer3", &timer3_clk), CLK(NULL, "rto", &rto_clk), CLK(NULL, "usb", &usb_clk), + CLK("dm355_ccdc", "master", &vpss_master_clk), + CLK("dm355_ccdc", "slave", &vpss_slave_clk), CLK(NULL, NULL, NULL), }; @@ -665,6 +667,17 @@ static struct platform_device dm355_asp1_device = { .resource = dm355_asp1_resources, }; +static void dm355_ccdc_setup_pinmux(void) +{ + davinci_cfg_reg(DM355_VIN_PCLK); + davinci_cfg_reg(DM355_VIN_CAM_WEN); + davinci_cfg_reg(DM355_VIN_CAM_VD); + davinci_cfg_reg(DM355_VIN_CAM_HD); + davinci_cfg_reg(DM355_VIN_YIN_EN); + davinci_cfg_reg(DM355_VIN_CINL_EN); + davinci_cfg_reg(DM355_VIN_CINH_EN); +} + static struct resource dm355_vpss_resources[] = { { /* VPSS BL Base address */ @@ -701,6 +714,10 @@ static struct resource vpfe_resources[] = { .end = IRQ_VDINT1, .flags = IORESOURCE_IRQ, }, +}; + +static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); +static struct resource dm355_ccdc_resource[] = { /* CCDC Base address */ { .flags = IORESOURCE_MEM, @@ -708,8 +725,18 @@ static struct resource vpfe_resources[] = { .end = 0x01c70600 + 0x1ff, }, }; +static struct platform_device dm355_ccdc_dev = { + .name = "dm355_ccdc", + .id = -1, + .num_resources = ARRAY_SIZE(dm355_ccdc_resource), + .resource = dm355_ccdc_resource, + .dev = { + .dma_mask = &vpfe_capture_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = dm355_ccdc_setup_pinmux, + }, +}; -static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); static struct platform_device vpfe_capture_dev = { .name = CAPTURE_DRV_NAME, .id = -1, @@ -860,17 +887,7 @@ static int __init dm355_init_devices(void) davinci_cfg_reg(DM355_INT_EDMA_CC); platform_device_register(&dm355_edma_device); platform_device_register(&dm355_vpss_device); - /* - * setup Mux configuration for vpfe input and register - * vpfe capture platform device - */ - davinci_cfg_reg(DM355_VIN_PCLK); - davinci_cfg_reg(DM355_VIN_CAM_WEN); - davinci_cfg_reg(DM355_VIN_CAM_VD); - davinci_cfg_reg(DM355_VIN_CAM_HD); - davinci_cfg_reg(DM355_VIN_YIN_EN); - davinci_cfg_reg(DM355_VIN_CINL_EN); - davinci_cfg_reg(DM355_VIN_CINH_EN); + platform_device_register(&dm355_ccdc_dev); platform_device_register(&vpfe_capture_dev); return 0; diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index e65e29e..e5f1ee9 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -315,6 +315,8 @@ struct davinci_clk dm644x_clks[] = { CLK(NULL, "timer0", &timer0_clk), CLK(NULL, "timer1", &timer1_clk), CLK("watchdog", NULL, &timer2_clk), + CLK("dm644x_ccdc", "master", &vpss_master_clk), + CLK("dm644x_ccdc", "slave", &vpss_slave_clk), CLK(NULL, NULL, NULL), }; @@ -612,6 +614,11 @@ static struct resource vpfe_resources[] = { .end = IRQ_VDINT1, .flags = IORESOURCE_IRQ, }, +}; + +static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); +static struct resource dm644x_ccdc_resource[] = { + /* CCDC Base address */ { .start = 0x01c70400, .end = 0x01c70400 + 0xff, @@ -619,7 +626,17 @@ static struct resource vpfe_resources[] = { }, }; -static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); +static struct platform_device dm644x_ccdc_dev = { + .name = "dm644x_ccdc", + .id = -1, + .num_resources = ARRAY_SIZE(dm644x_ccdc_resource), + .resource = dm644x_ccdc_resource, + .dev = { + .dma_mask = &vpfe_capture_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + static struct platform_device vpfe_capture_dev = { .name = CAPTURE_DRV_NAME, .id = -1, @@ -772,6 +789,7 @@ static int __init dm644x_init_devices(void) platform_device_register(&dm644x_edma_device); platform_device_register(&dm644x_emac_device); platform_device_register(&dm644x_vpss_device); + platform_device_register(&dm644x_ccdc_dev); platform_device_register(&vpfe_capture_dev); return 0;